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分析了調幅信號和載波信號之間的相位差與調制信號的極性的對應關系,得出了相敏檢波電路輸出電壓的極性與調制信號的極性有對應關系的結論。為了驗證相敏檢波電路的這一特性,給出3 個電路方案,分別選用理想元件和實際元件,采用Multisim 對其進行仿真實驗,直觀形象地演示了相敏檢波電路的鑒相特性,是傳統的實際操作實驗所不可比擬的。關鍵詞:相敏檢波;鑒相特性;Multisim;電路仿真
Abstract : The corresponding relation between modulation signal polarity and difference phases of amplitudemodulated signal and the carrier signal ,the polarity of phase2sensitive detecting circuit output voltage and the polarity of modulation signal are correspondent . In order to verify this characteristic ,three elect ric circuit s plans are produced ,idea element s and actual element s are selected respectively. Using Multisim to carry on a simulation experiment ,and then demonst rating the phase detecting characteristic of the phase sensitive circuit vividly and directly. Which is t raditional practical experience cannot be com pared.Keywords :phase sensitive detection ;phase2detecting characteristic ;Multisim;circuit simulation
標簽：
相敏檢波
電路
仿真研究
鑒相
上傳時間：
2013-11-23
上傳用戶：guanhuihong
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該系統由單片機89S52控制模塊，程控寬帶放大模塊，整形模塊，FPGA內頻率、相位差測量模塊等構成，采用等精度測頻法測出頻率和周期，可測量有效值為0.01～5V，頻率范圍1Hz～20MHz信號的頻率、周期信號，精度高達10-6。采用計數法測量相位差，該系統可測量有效值0.5～5V，頻率10Hz～100kHz信號的相位差，精度為1°。系統功能由按鍵控制，測量結果實時顯示，人機界面友好。
Abstract:
The system consists of the following functional blocks:89S52microcontroller controlling module,programmable amplifier module,comparator module,frequency and phase difference testing module in the FPGA.The system use the equal accuracy frequency-examining technique it measures frequency and circle of signal which its ranges is from1Hz to20MHz and the amplitude of which its range is from0.01Vrms to5Vrms,precision is up to10-6.Using of count method,the system detects the phase difference of signal,the amplitude of whic its range is from0.5Vrms to5Vrms and the frequency of which its ranges is from10Hz to100kHz,precision is up to1°,The system functions is controlled by certain keys,measurement results are displayed in real-time and it is friendly interface.
標簽：
89S52
單片機
多功能
計數器
上傳時間：
2013-11-04
上傳用戶：CHINA526
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以89S52單片機和EP1C6Q240C8型FPGA為控制核心的多功能計數器，是由峰值檢波、A/D轉換、程控放大、比較整形、移相網絡部分組成,可實現測量正弦信號的頻率、周期和相位差的功能。多功能計數器采用等精度的測量方法，可實現頻率為1Hz～10MHz、幅度為0.01～5Vrms的正弦信號的精確測頻，以及頻率為10Hz～100kHz、幅度為0.5～5Vrms的正弦信號精確測相。液晶顯示器能夠實時顯示當前信號的頻率、周期和相位差。該多功能計數器精度高，界面友好，實用性強。
Abstract:
A multi-function counter，which uses89S52MCU and EP1C6Q240C8FPGA as a control core，consists of peak detector，A/D conversion，program-controlled amplification，compared shaping and phase-shifting network part.The counter measures the frequency，period and phase of sinusoidal signal.With the equal precision method,the multi-function counter achieves the precise frequency measurement of the sinusoidal signal which its frequency is from1Hz to10MHz，its amplitude is from0.01Vrms to5Vrms，as well as the accurate phase measurement of the sinusoidal signal which its frequency is from10Hz to100kHz，its amplitude is from0.5Vrms to5Vrms.The LCD monitor real-time displays the frequency，period and phase difference of current signal.The multi-function counter features high precision，friendly interface，and strong practical.
標簽：
FPGA
單片機
多功能
計數器
上傳時間：
2013-11-15
上傳用戶：gy592333
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Internal Interrupts are used to respond to asynchronous requests from a certain part of themicrocontroller that needs to be serviced. Each peripheral in the TriCore as well as theBus Control Unit, the Debug Unit, the Peripheral Control Processor (PCP) and the CPUitself can generate an Interrupt Request.So what is an external Interrupt?An external Interrupt is something alike as the internal Interrupt. The difference is that anexternal Interrupt request is caused by an external event. Normally this would be a pulseon Port0 or Port1, but it can be even a signal from the input buffer of the SSC, indicatingthat a service is requested.The User’s Manual does not explain this aspect in detail so this ApNote will explain themost common form of an external Interrupt request. This ApNote will show that there is aneasy way to react on a pulse on Port0 or Port1 and to create with this impulse an InterruptService Request. Later in the second part of the document, you can find hints on how todebounce impulses to enable the use of a simple switch as the input device.Note: You will find additional information on how to setup the Interrupt System in theApNote “First steps through the TriCore Interrupt System” (AP3222xx)1. It would gobeyond the scope of this document to explain this here, but you will find selfexplanatoryexamples later on.
標簽：
Exter
easy
work
with
上傳時間：
2013-10-27
上傳用戶：zhangyigenius
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為了在CDMA系統中更好地應用QDPSK數字調制方式，在分析四相相對移相（QDPSK)信號調制解調原理的基礎上，設計了一種QDPSK調制解調電路，它包括串并轉換、差分編碼、四相載波產生和選相、相干解調、差分譯碼和并串轉換電路。在MAX+PLUSⅡ軟件平臺上，進行了編譯和波形仿真。綜合后下載到復雜可編程邏輯器件EPM7128SLC84-15中，測試結果表明，調制電路能正確選相，解調電路輸出數據與QDPSK調制輸入數據完全一致，達到了預期的設計要求。
Abstract:
In order to realize the better application of digital modulation mode QDPSK in the CDMA system， a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase，and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.
標簽：
QDPSK
CPLD
調制解調
電路設計
上傳時間：
2014-01-13
上傳用戶：qoovoop
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為了在CDMA系統中更好地應用QDPSK數字調制方式，在分析四相相對移相（QDPSK)信號調制解調原理的基礎上，設計了一種QDPSK調制解調電路，它包括串并轉換、差分編碼、四相載波產生和選相、相干解調、差分譯碼和并串轉換電路。在MAX+PLUSⅡ軟件平臺上，進行了編譯和波形仿真。綜合后下載到復雜可編程邏輯器件EPM7128SLC84-15中，測試結果表明，調制電路能正確選相，解調電路輸出數據與QDPSK調制輸入數據完全一致，達到了預期的設計要求。
Abstract:
In order to realize the better application of digital modulation mode QDPSK in the CDMA system， a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase，and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.
標簽：
QDPSK
CPLD
調制解調
電路設計
上傳時間：
2013-10-28
上傳用戶：jyycc
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A new cable fault location method based on
wavelet reconstruction is proposed. In this method the
difference between the currents of faulty phase and sound
phase under the high voltage pulse excitation is used as the
measured signal and is decomposed in multi-scale by wavelet
transform, then reconstructed in single scale. Comparing with
traditional fault location method by travelling wave, the
presented method will not be interfered by the reflected wave
from the branch joint of cables or from other positions where
the impedances are not matched and not be influenced by fault
types, otherwise, the reflected waves can be recognized even
the faulty position is near to the measuring terminal, at the
same time, the influence of the wave speed uncertainty can be
reduced. The correctness of the proposed method is proved by
simulation results.
標簽：
method
reconstruction
location
proposed
上傳時間：
2016-02-04
上傳用戶：maizezhen
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基于OFDM的無線寬帶系統仿真It contains mainly two parts, i.e. link-level simulator and system-level simulator.
Link-level simulator focus on a single-cell single-user scenario, where signal is transmitted from tx, and estimated at rx. Comparing the difference in tx/rx signal, the error rate can be found out. The output of the link-level simulator is the BLER/BER vs. SNR mapping table, that can be used for the system-level simulation.
System-level simulator focus on a multi-cell multi-user scenario. For the sake of simplicity, it takes the mapping table aquired in the link-level simulation, measure the actural SNR, and finds the corresponding error rate.
標簽：
simulator
i.e.
system-level
link-level
上傳時間：
2016-03-15
上傳用戶：xsnjzljj
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ExcpHook is an open source (see license.txt) Exception Monitor for Windows made by Gynvael Coldwind (of Team Vexillium). t uses a ring0 driver to hook KiExceptionDispatch procedure to detect the exceptions, and then shows information about the exception on stdout (using the ring3 part of the program ofc).
The difference between this method, and the standard debug API method it that this method monitores all of XP processes, and the program does not have to attach to any other process to monitor it, hence it s harder to detect.
The code currently is considered as ALPHA, and it has been reported to BSoD sometimes (on multi core/cpu machines). Take Care!
標簽：
Exception
ExcpHook
Coldwind
Monitor
上傳時間：
2014-02-10
上傳用戶：jing911003
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％ EM algorithm for k multidimensional Gaussian mixture estimation
％
％ Inputs:
％ X(n,d) - input data, n=number of observations, d=dimension of variable
％ k - maximum number of Gaussian components allowed
％ ltol - percentage of the log likelihood difference between 2 iterations ([] for none)
％ maxiter - maximum number of iteration allowed ([] for none)
％ pflag - 1 for plotting GM for 1D or 2D cases only, 0 otherwise ([] for none)
％ Init - structure of initial W, M, V: Init.W, Init.M, Init.V ([] for none)
％
％ Ouputs:
％ W(1,k) - estimated weights of GM
％ M(d,k) - estimated mean vectors of GM
％ V(d,d,k) - estimated covariance matrices of GM
％ L - log likelihood of estimates
％
標簽：
multidimensional
estimation
algorithm
Gaussian
上傳時間：
2013-12-03
上傳用戶：我們的船長
