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In a world experiencing challenging transitions in multiple arenas—energy, healthcare, industry,finance, and security, to name a few—Maxim Integrated’s Industrial and Medical SolutionsGroup offers superior signal chain solutions that are innovative, accurate, and cost-effective.
標(biāo)簽：
模擬
信號(hào)鏈
上傳時(shí)間：
2013-11-12
上傳用戶：fanxiaoqie
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Abstract: Specifications such as noise, effective number of bits (ENOB), effective resolution, and noise-free resolution inlarge part define how accurate an ADC really is. Consequently, understanding the performance metrics related to noise isone of the most difficult aspects of transitioning from a SAR to a delta-sigma ADC. With the current demand for higherresolution, designers must develop a better understanding of ADC noise, ENOB, effective resolution, and signal-to-noiseratio (SNR). This application note helps that understanding.
標(biāo)簽：
ENOB
模數(shù)轉(zhuǎn)換器
上傳時(shí)間：
2013-10-16
上傳用戶：x18010875091
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單片機(jī)作為一種微型計(jì)算機(jī)，其內(nèi)部具有一定的存儲(chǔ)單元（8031除外），但由于其內(nèi)部存儲(chǔ)單元及端口有限，很多情況下難以滿足實(shí)際需求。為此介紹一種新的擴(kuò)展方法，將數(shù)據(jù)線與地址線合并使用，通過(guò)軟件控制的方法實(shí)現(xiàn)數(shù)據(jù)線與地址線功能的分時(shí)轉(zhuǎn)換，數(shù)據(jù)線不僅用于傳送數(shù)據(jù)信號(hào)，還可作為地址線、控制線，用于傳送地址信號(hào)和控制信號(hào)，從而實(shí)現(xiàn)單片機(jī)與存儲(chǔ)器件的有效連接。以單片機(jī)片外256KB數(shù)據(jù)存儲(chǔ)空間的擴(kuò)展為例，通過(guò)該擴(kuò)展方法，僅用10個(gè)I/O端口便可實(shí)現(xiàn)，與傳統(tǒng)的擴(kuò)展方法相比，可節(jié)約8個(gè)I/O端口。
Abstract:
As a micro-computer,the SCM internal memory has a certain units(except8031),but because of its internal storage units and the ports are limited,in many cases it can not meet the actual demand.So we introduced a new extension method,the data line and address lines combined through software-controlled approach to realize the time-conversion functions of data lines and address lines,so the data lines not only transmited data signals,but also served as address lines and control lines to transmit address signals and control signals,in order to achieve an effective connection of microcontroller and memory chips.Take microcontroller chip with256KB of data storage space expansion as example,through this extension method,with only10I/O ports it was achieved,compared with the traditional extension methods,this method saves8I/O ports.
標(biāo)簽：
單片機(jī)
P0口
數(shù)據(jù)存儲(chǔ)器
擴(kuò)展
上傳時(shí)間：
2014-12-26
上傳用戶：adada
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Luminary Micro provides an analog-to-digital converter (ADC) module on some members of theStellaris microcontroller family. The hardware resolution of the ADC is 10 bits; however, due to noiseand other accuracy-diminishing factors, the true accuracy is less than 10 bits. This application noteprovides a software-based oversampling technique, resulting in an improved effective Number OfBits (ENOB) in the conversion result. This document describes methods of oversampling an inputsignal, and the impact on precision and overall system performance.
標(biāo)簽：
Oversampling
Techniques
ADC
fo
上傳時(shí)間：
2013-12-17
上傳用戶：zhyiroy
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The main oscillator allows either a crystal or single-ended input clock signal. Cost-sensitiveapplications typically use an external crystal with the on-chip oscillator circuit since it is the mostcost-effective solution. It is also possible to use the internal oscillator to clock the device after theboot process has completed.
標(biāo)簽：
Stellaris
Clocking
Options
for
上傳時(shí)間：
2013-10-14
上傳用戶：pol123
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In this document, the term Ô60xÕ is used to denote a 32-bit microprocessor from the PowerPC architecture family that conforms to the bus interface of the PowerPC 601ª, PowerPC 603ª, or PowerPC 604 microprocessors. Note that this does not include the PowerPC 602ª microprocessor which has a multiplexed address/data bus. 60x processors implement the PowerPC architecture as it is speciÞed for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits,and ßoating-point data types of 32 and 64 bits (single-precision and double-precision).1.1 Overview The MPC106 provides an integrated high-bandwidth, high-performance, TTL-compatible interface between a 60x processor, a secondary (L2) cache or additional (up to four total) 60x processors, the PCI bus,and main memory. This section provides a block diagram showing the major functional units of the 106 and describes brießy how those units interact.Figure 1 shows the major functional units within the 106. Note that this is a conceptual block diagram intended to show the basic features rather than an attempt to show how these features are physically implemented on the device.
標(biāo)簽：
Bridge
Memory
Contr
MPC
上傳時(shí)間：
2013-10-08
上傳用戶：18711024007
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The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s high-density nonvolatile memory technology and iscompatible with the industry-standard 80C51 and 80C52 instruction set and pinout.The on-chip Flash allows the program memory to be reprogrammed in-system or by aconventional nonvolatile memory programmer. By combining a versatile 8-bit CPUwith Flash on a monolithic chip, the Atmel AT89C52 is a powerful microcomputerwhich provides a highly-flexible and cost-effective solution to many embedded controlapplications.
標(biāo)簽：
89c
c52
at
上傳時(shí)間：
2013-11-10
上傳用戶：1427796291
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Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
標(biāo)簽：
封裝
器件
用戶
賽靈思
上傳時(shí)間：
2013-10-22
上傳用戶：ztj182002
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Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective solution. Maxim's 3GPP TS25.104-compliant transceiver solution is presented along withcomplete radio reference designs such as RD2550. For more information on the RD2550, see reference design 5364, "FemtocellRadio Reference Designs Using the MAX2550–MAX2553 Transceivers."
標(biāo)簽：
Base-Station
Applications
Single-Chip
Transceiver
上傳時(shí)間：
2013-11-07
上傳用戶：songrui
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Abstract: This reference design provides design ideas for a cost-effective, low-power liquid-level measurement dataacquisition system (DAS) using a compensated silicon pressure sensor and a high-precision delta-sigma ADC. Thisdocument discusses how to select the compensated silicon pressure sensor, suggest system algorithms, and providenoise analyses. It also describes calibration ideas to improve system performance while also reducing complexity andcost.
標(biāo)簽：
如何選擇
補(bǔ)償
硅壓力傳感器
上傳時(shí)間：
2013-10-08
上傳用戶：sjy1991
