To enable or Disable Task Manager
標(biāo)簽： Disable Manager enable Task
上傳時(shí)間： 2013-11-29
上傳用戶：cuiyashuo
Linear Technology’s high performance battery management ICsenable long battery life and run time, while providing precision charging control, constantstatus monitoring and stringent battery protection. Our proprietary design techniques seamlesslymanage multiple input sources while providing small solution footprints, faster charging and100% standalone operation. Battery and circuit protection features enable improved thermalperformance and high reliability operation.
上傳時(shí)間： 2013-10-13
上傳用戶：yyq123456789
GPS-3303C直流穩(wěn)壓電源具有3組獨(dú)立直流電源輸出，3位數(shù)字顯示器，可同時(shí)顯示兩組電壓及電流，具有過載及反向極性保護(hù)，可選擇連續(xù)/動態(tài)負(fù)載，輸出 具有enable/Disable 控制，具有自動串聯(lián)及自動并聯(lián)同步操作，定電壓及定電流操作，并具有低漣波及雜訊的特點(diǎn)。
標(biāo)簽： 2303 GPS 直流穩(wěn)壓電源 使用說明
上傳時(shí)間： 2014-12-24
上傳用戶：lijinchuan
Each year Vishay releases thousands of new components that enable our customers to create new and superior end products. We recognize that offering unique component solutions helps improve the performance of next-generation devices, overcome technical barriers, and create new markets.
上傳時(shí)間： 2013-12-14
上傳用戶：ming529
NCV8503是一款高精度微功耗電源穩(wěn)壓器。輸出電流可達(dá)400mA。該器件提供多個(gè)級別的輸出電壓供客戶選擇：2.5V、3.3V、5.0V，及可調(diào)輸出版本。在負(fù)載為400mA時(shí)，最大壓降僅為0.6V，電壓輸出精度在±2.0%以內(nèi)。當(dāng)enable=0V時(shí)，靜態(tài)電流低于1uA；如果enable=5V，負(fù)載為100uA靜態(tài)電流僅為200uA。非常適合電池供電設(shè)備。支持RESET輸出（帶DELAY功能），可用于微處理器邏輯控制。當(dāng)輸出電壓達(dá)到1.0V時(shí)，RESET電路即可正常工作。當(dāng)電源上電及電壓跌落于門檻電壓時(shí)，RESET電路輸出復(fù)位信號。
標(biāo)簽： 8503 NCV LDO 集成復(fù)位
上傳時(shí)間： 2013-11-22
上傳用戶：xieguodong1234
AT89C2051驅(qū)動步進(jìn)電機(jī)的電路和源碼:AT89C2051驅(qū)動步進(jìn)電機(jī)的電路和源碼 程序:stepper.c stepper.hex/* * STEPPER.C * sweeping stepper's rotor cw and cww 400 steps * Copyright (c) 1999 by W.Sirichote */＃i nclude c:\mc5151io.h /* include i/o header file */ ＃i nclude c:\mc5151reg.hregister unsigned char j,flag1,temp; register unsigned int cw_n,ccw_n;unsigned char step[8]={0x80,0xc0,0x40,0x60,0x20,0x30,0x10,0x90} #define n 400/* flag1 mask byte 0x01 run cw() 0x02 run ccw() */main(){ flag1=0; serinit(9600); disable(); /* no need timer interrupt */ cw_n = n; /* initial step number for cw */ flag1 |=0x01; /* initial enable cw() */while(1){ { tick_wait(); /* wait for 10ms elapsed */energize(); /* round-robin execution the following tasks every 10ms */ cw(); ccw(); } }}cw(){ if((flag1&0x01)!=0) { cw_n--; /* decrement cw step number */ if (cw_n !=0) j++; /* if not zero increment index j */ else {flag1&=~0x01; /* disable cw() execution */ ccw_n = n; /* reload step number to ccw counter */ flag1 |=0x02; /* enable cww() execution */ } }
上傳時(shí)間： 2013-11-21
上傳用戶：boyaboy
The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallelInput/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed toenhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvementsinclude higher drive capability, 5 V I/O tolerance, lower supply current, individual I/Oconfiguration, and smaller packaging. I/O expanders provide a simple solution whenadditional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.The PCA9555 consists of two 8-bit Configuration (Input or Output selection); Input, Outputand Polarity Inversion (active HIGH or active LOW operation) registers. The systemmaster can enable the I/Os as either inputs or outputs by writing to the I/O configurationbits. The data for each Input or Output is kept in the corresponding Input or Outputregister. The polarity of the read register can be inverted with the Polarity Inversionregister. All registers can be read by the system master. Although pin-to-pin and I2C-busaddress compatible with the PCF8575, software changes are required due to theenhancements, and are discussed in Application Note AN469.
上傳時(shí)間： 2013-11-13
上傳用戶：fredguo
The PCA9557 is a silicon CMOS circuit which provides parallel input/output expansion for SMBus and I2C-bus applications. The PCA9557 consists of an 8-bit input port register, 8-bit output port register, and an I2C-bus/SMBus interface. It has low current consumption and a high-impedance open-drain output pin, IO0. The system master can enable the PCA9557’s I/O as either input or output by writing to the configuration register. The system master can also invert the PCA9557 inputs by writing to the active HIGH polarity inversion register. Finally, the system master can reset the PCA9557 in the event of a time-out by asserting a LOW in the reset input. The power-on reset puts the registers in their default state and initializes the I2C-bus/SMBus state machine. The RESET pin causes the same reset/initialization to occur without de-powering the part.
標(biāo)簽： C-bus SMBus reset port
上傳時(shí)間： 2014-01-18
上傳用戶：bs2005
PC機(jī)之間串口通信的實(shí)現(xiàn)一、實(shí)驗(yàn)?zāi)康?nbsp;１．熟悉微機(jī)接口實(shí)驗(yàn)裝置的結(jié)構(gòu)和使用方法。 ２．掌握通信接口芯片8251和8250的功能和使用方法。 ３．學(xué)會串行通信程序的編制方法。 二、實(shí)驗(yàn)內(nèi)容與要求 １．基本要求主機(jī)接收開關(guān)量輸入的數(shù)據(jù)（二進(jìn)制或十六進(jìn)制），從鍵盤上按“傳輸”鍵（可自行定義），就將該數(shù)據(jù)通過8251A傳輸出去。終端接收后在顯示器上顯示數(shù)據(jù)。具體操作說明如下：（１）出現(xiàn)提示信息“start with R in the board!”，通過調(diào)整乒乓開關(guān)的狀態(tài)，設(shè)置8位數(shù)據(jù)；（２）在小鍵盤上按“R”鍵，系統(tǒng)將此時(shí)乒乓開關(guān)的狀態(tài)讀入計(jì)算機(jī)I中，并顯示出來，同時(shí)顯示經(jīng)串行通訊后，計(jì)算機(jī)II接收到的數(shù)據(jù)；（３）完成后，系統(tǒng)提示“do you want to send another data? Y/N”，根據(jù)用戶需要，在鍵盤按下“Y”鍵，則重復(fù)步驟（1），進(jìn)行另一數(shù)據(jù)的通訊；在鍵盤按除“Y”鍵外的任意鍵，將退出本程序。２．提高要求 能夠進(jìn)行出錯(cuò)處理，例如采用奇偶校驗(yàn)，出錯(cuò)重傳或者采用接收方回傳和發(fā)送方確認(rèn)來保證發(fā)送和接收正確。 三、設(shè)計(jì)報(bào)告要求 １．設(shè)計(jì)目的和內(nèi)容 ２．總體設(shè)計(jì) ３．硬件設(shè)計(jì)：原理圖（接線圖）及簡要說明 ４．軟件設(shè)計(jì)框圖及程序清單５．設(shè)計(jì)結(jié)果和體會（包括遇到的問題及解決的方法） 四、8251A通用串行輸入/輸出接口芯片由于CPU與接口之間按并行方式傳輸，接口與外設(shè)之間按串行方式傳輸，因此，在串行接口中，必須要有“接收移位寄存器”（串→并）和“發(fā)送移位寄存器”（并→串）。能夠完成上述“串←→并”轉(zhuǎn)換功能的電路，通常稱為“通用異步收發(fā)器”（UART：Universal Asynchronous Receiver and Transmitter）,典型的芯片有：Intel 8250/8251。8251A異步工作方式：如果8251A編程為異步方式，在需要發(fā)送字符時(shí)，必須首先設(shè)置TXEN和CTS#為有效狀態(tài)，TXEN(Transmitter enable)是允許發(fā)送信號，是命令寄存器中的一位；CTS#(Clear To Send)是由外設(shè)發(fā)來的對CPU請求發(fā)送信號的響應(yīng)信號。然后就開始發(fā)送過程。在發(fā)送時(shí)，每當(dāng)CPU送往發(fā)送緩沖器一個(gè)字符，發(fā)送器自動為這個(gè)字符加上1個(gè)起始位，并且按照編程要求加上奇／偶校驗(yàn)位以及1個(gè)、1.5個(gè)或者2個(gè)停止位。串行數(shù)據(jù)以起始位開始，接著是最低有效數(shù)據(jù)位，最高有效位的后面是奇／偶校驗(yàn)位，然后是停止位。按位發(fā)送的數(shù)據(jù)是以發(fā)送時(shí)鐘TXC的下降沿同步的，也就是說這些數(shù)據(jù)總是在發(fā)送時(shí)鐘TXC的下降沿從8251A發(fā)出。數(shù)據(jù)傳輸?shù)牟ㄌ芈嗜Q于編程時(shí)指定的波特率因子，為發(fā)送器時(shí)鐘頻率的1、1/16或1/64。當(dāng)波特率指定為16時(shí)，數(shù)據(jù)傳輸?shù)牟ㄌ芈示褪前l(fā)送器時(shí)鐘頻率的1/16。CPU通過數(shù)據(jù)總線將數(shù)據(jù)送到8251A的數(shù)據(jù)輸出緩沖寄存器以后，再傳輸?shù)桨l(fā)送緩沖器，經(jīng)移位寄存器移位，將并行數(shù)據(jù)變?yōu)榇袛?shù)據(jù)，從TxD端送往外部設(shè)備。在8251A接收字符時(shí)，命令寄存器的接收允許位RxE(Receiver enable)必須為1。8251A通過檢測RxD引腳上的低電平來準(zhǔn)備接收字符，在沒有字符傳送時(shí)RxD端為高電平。8251A不斷地檢測RxD引腳，從RxD端上檢測到低電平以后，便認(rèn)為是串行數(shù)據(jù)的起始位，并且啟動接收控制電路中的一個(gè)計(jì)數(shù)器來進(jìn)行計(jì)數(shù)，計(jì)數(shù)器的頻率等于接收器時(shí)鐘頻率。計(jì)數(shù)器是作為接收器采樣定時(shí)，當(dāng)計(jì)數(shù)到相當(dāng)于半個(gè)數(shù)位的傳輸時(shí)間時(shí)再次對RxD端進(jìn)行采樣，如果仍為低電平，則確認(rèn)該數(shù)位是一個(gè)有效的起始位。若傳輸一個(gè)字符需要16個(gè)時(shí)鐘，那么就是要在計(jì)數(shù)8個(gè)時(shí)鐘后采樣到低電平。之后，8251A每隔一個(gè)數(shù)位的傳輸時(shí)間對RxD端采樣一次，依次確定串行數(shù)據(jù)位的值。串行數(shù)據(jù)位順序進(jìn)入接收移位寄存器，通過校驗(yàn)并除去停止位，變成并行數(shù)據(jù)以后通過內(nèi)部數(shù)據(jù)總線送入接收緩沖器，此時(shí)發(fā)出有效狀態(tài)的RxRDY信號通知CPU，通知CPU8251A已經(jīng)收到一個(gè)有效的數(shù)據(jù)。一個(gè)字符對應(yīng)的數(shù)據(jù)可以是5～8位。如果一個(gè)字符對應(yīng)的數(shù)據(jù)不到8位，8251A會在移位轉(zhuǎn)換成并行數(shù)據(jù)的時(shí)候，自動把他們的高位補(bǔ)成0。 五、系統(tǒng)總體設(shè)計(jì)方案根據(jù)系統(tǒng)設(shè)計(jì)的要求，對系統(tǒng)設(shè)計(jì)的總體方案進(jìn)行論證分析如下：1．獲取8位開關(guān)量可使用實(shí)驗(yàn)臺上的8255A可編程并行接口芯片，因?yàn)橹灰@取8位數(shù)據(jù)量，只需使用基本輸入和8位數(shù)據(jù)線，所以將8255A工作在方式0，PA0-PA7接實(shí)驗(yàn)臺上的8位開關(guān)量。2．當(dāng)使用串口進(jìn)行數(shù)據(jù)傳送時(shí)，雖然同步通信速度遠(yuǎn)遠(yuǎn)高于異步通信，可達(dá)500kbit/s，但由于其需要有一個(gè)時(shí)鐘來實(shí)現(xiàn)發(fā)送端和接收端之間的同步，硬件電路復(fù)雜，通常計(jì)算機(jī)之間的通信只采用異步通信。3．由于8251A本身沒有時(shí)鐘，需要外部提供，所以本設(shè)計(jì)中使用實(shí)驗(yàn)臺上的8253芯片的計(jì)數(shù)器2來實(shí)現(xiàn)。4：顯示和鍵盤輸入均使用DOS功能調(diào)用來實(shí)現(xiàn)。設(shè)計(jì)思路框圖，如下圖所示： 六、硬件設(shè)計(jì)硬件電路主要分為8位開關(guān)量數(shù)據(jù)獲取電路，串行通信數(shù)據(jù)發(fā)送電路，串行通信數(shù)據(jù)接收電路三個(gè)部分。1．8位開關(guān)量數(shù)據(jù)獲取電路該電路主要是利用8255并行接口讀取8位乒乓開關(guān)的數(shù)據(jù)。此次設(shè)計(jì)在獲取8位開關(guān)數(shù)據(jù)量時(shí)采用8255令其工作在方式0，A口輸入8位數(shù)據(jù)，CS#接實(shí)驗(yàn)臺上CS1口，對應(yīng)端口為280H-283H，PA0-PA7接8個(gè)開關(guān)。2．串行通信電路串行通信電路本設(shè)計(jì)中8253主要為8251充當(dāng)頻率發(fā)生器，接線如下圖所示。
上傳時(shí)間： 2013-12-19
上傳用戶：小火車?yán)怖怖?/p>
Internal Interrupts are used to respond to asynchronous requests from a certain part of themicrocontroller that needs to be serviced. Each peripheral in the TriCore as well as theBus Control Unit, the Debug Unit, the Peripheral Control Processor (PCP) and the CPUitself can generate an Interrupt Request.So what is an external Interrupt?An external Interrupt is something alike as the internal Interrupt. The difference is that anexternal Interrupt request is caused by an external event. Normally this would be a pulseon Port0 or Port1, but it can be even a signal from the input buffer of the SSC, indicatingthat a service is requested.The User’s Manual does not explain this aspect in detail so this ApNote will explain themost common form of an external Interrupt request. This ApNote will show that there is aneasy way to react on a pulse on Port0 or Port1 and to create with this impulse an InterruptService Request. Later in the second part of the document, you can find hints on how todebounce impulses to enable the use of a simple switch as the input device.Note: You will find additional information on how to setup the Interrupt System in theApNote “First steps through the TriCore Interrupt System” (AP3222xx)1. It would gobeyond the scope of this document to explain this here, but you will find selfexplanatoryexamples later on.
標(biāo)簽： Exter easy work with
上傳時(shí)間： 2013-10-27
上傳用戶：zhangyigenius
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