Applying power to a standard logic chip, SRAM, or EPROM, usually results in output pinstracking the applied voltage as it rises. Programmable logic attempts to emulate that behavior,but physics forbids perfect emulation, due to the device programmability. It requires care tospecify the pin behavior, because programmable parts encounter unknown variables – yourdesign and your power environment.
標簽：
Xilinx
XAPP
CPLD
440
上傳時間：
2013-11-24
上傳用戶：253189838
