-
WP369可擴展式處理平臺-各種嵌入式系統的理想解決方案 ：Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.
標簽：
369
WP
擴展式
處理平臺
上傳時間：
2013-10-22
上傳用戶：685
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很多不同的廠家生產各種型號的計算機，它們運行完全不同的操作系統，但TCP.IP協議族允許它們互相進行通信。這一點很讓人感到吃驚，因為它的作用已遠遠超出了起初的設想。T C P / I P起源于6 0年代末美國政府資助的一個分組交換網絡研究項目，到9 0年代已發展成為計算機之間最常應用的組網形式。它是一個真正的開放系統，因為協議族的定義及其多種實現可以不用花錢或花很少的錢就可以公開地得到。它成為被稱作“全球互聯網”或“因特網(Internet)”的基礎，該廣域網（WA N）已包含超過1 0 0萬臺遍布世界各地的計算機。本章主要對T C P / I P協議族進行概述，其目的是為本書其余章節提供充分的背景知識。
TCP.IP協議 縮略語
ACK (ACKnowledgment) TCP首部中的確認標志
API (Application Programming Interface) 應用編程接口
ARP (Address Resolution Protocol) 地址解析協議
ARPANET(Defense Advanced Research Project Agency NETwork) (美國)國防部遠景研究規劃局
AS (Autonomous System) 自治系統
ASCII (American Standard Code for Information Interchange) 美國信息交換標準碼
ASN.1 (Abstract Syntax Notation One) 抽象語法記法1
BER (Basic Encoding Rule) 基本編碼規則
BGP (Border Gateway Protocol) 邊界網關協議
BIND (Berkeley Internet Name Domain) 伯克利I n t e r n e t域名
BOOTP (BOOTstrap Protocol) 引導程序協議
BPF (BSD Packet Filter) BSD 分組過濾器
CIDR (Classless InterDomain Routing) 無類型域間選路
CIX (Commercial Internet Exchange) 商業互聯網交換
CLNP (ConnectionLess Network Protocol) 無連接網絡協議
CRC (Cyclic Redundancy Check) 循環冗余檢驗
CSLIP (Compressed SLIP) 壓縮的S L I P
CSMA (Carrier Sense Multiple Access) 載波偵聽多路存取
DCE (Data Circuit-terminating Equipment) 數據電路端接設備
DDN (Defense Data Network) 國防數據網
DF (Don’t Fragment) IP首部中的不分片標志
DHCP (Dynamic Host Configuration Protocol) 動態主機配置協議
DLPI (Data Link Provider Interface) 數據鏈路提供者接口
DNS (Domain Name System) 域名系統
DSAP (Destination Service Access Point) 目的服務訪問點
DSLAM (DSL Access Multiplexer) 數字用戶線接入復用器
DSSS (Direct Sequence Spread Spectrum) 直接序列擴頻
DTS (Distributed Time Service) 分布式時間服務
DVMRP (Distance Vector Multicast Routing Protocol) 距離向量多播選路協議
EBONE (European IP BackbONE) 歐洲I P主干網
EOL (End of Option List) 選項清單結束
EGP (External Gateway Protocol) 外部網關協議
EIA (Electronic Industries Association) 美國電子工業協會
FCS (Frame Check Sequence) 幀檢驗序列
FDDI (Fiber Distributed Data Interface) 光纖分布式數據接口
FIFO (First In, First Out) 先進先出
FIN (FINish) TCP首部中的結束標志
FQDN (Full Qualified Domain Name) 完全合格的域名
FTP (File Transfer Protocol) 文件傳送協議
HDLC (High-level Data Link Control) 高級數據鏈路控制
HELLO 選路協議
IAB (Internet Architecture Board) Internet體系結構委員會
IANA (Internet Assigned Numbers Authority) Internet號分配機構
ICMP (Internet Control Message Protocol) Internet控制報文協議
IDRP (InterDomain Routing Protocol) 域間選路協議
IEEE (Institute of Electrical and Electronics Engineering) （美國）電氣與電子工程師協會
IEN (Internet Experiment Notes) 互聯網試驗注釋
IESG (Internet Engineering Steering Group) Internet工程指導小組
IETF (Internet Engineering Task Force) Internet工程專門小組
IGMP (Internet Group Management Protocol) Internet組管理協議
IGP (Interior Gateway Protocol) 內部網關協議
IMAP (Internet Message Access Protocol) Internet報文存取協議
IP (Internet Protocol) 網際協議
I RTF (Internet Research Task Force) Internet研究專門小組
IS-IS (Intermediate System to Intermediate System Protocol) 中間系統到中間系統協議
ISN (Initial Sequence Number) 初始序號
ISO (International Organization for Standardization) 國際標準化組織
ISOC (Internet SOCiety) Internet協會
LAN (Local Area Network) 局域網
LBX (Low Bandwidth X) 低帶寬X
LCP (Link Control Protocol) 鏈路控制協議
LFN (Long Fat Net) 長肥網絡
LIFO (Last In, First Out) 后進先出
LLC (Logical Link Control) 邏輯鏈路控制
LSRR (Loose Source and Record Route) 寬松的源站及記錄路由
MBONE (Multicast Backbone On the InterNEt) Internet上的多播主干網
MIB (Management Information Base) 管理信息庫
MILNET (MILitary NETwork) 軍用網
MIME (Multipurpose Internet Mail Extensions) 通用I n t e r n e t郵件擴充
MSL (Maximum Segment Lifetime) 報文段最大生存時間
MSS (Maximum Segment Size) 最大報文段長度
M TA (Message Transfer Agent) 報文傳送代理
MTU (Maximum Transmission Unit) 最大傳輸單元
NCP (Network Control Protocol) 網絡控制協議
NFS (Network File System) 網絡文件系統
NIC (Network Information Center) 網絡信息中心
NIT (Network Interface Tap) 網絡接口栓（S u n公司的一個程序）
NNTP (Network News Transfer Protocol) 網絡新聞傳送協議
NOAO (National Optical Astronomy Observatories) 國家光學天文臺
NOP (No Operation) 無操作
NSFNET (National Science Foundation NETwork) 國家科學基金網絡
NSI (NASA Science Internet) （美國）國家宇航局I n t e r n e t
NTP (Network Time Protocol) 網絡時間協議
NVT (Network Virtual Terminal) 網絡虛擬終端
OSF (Open Software Foudation) 開放軟件基金
OSI (Open Systems Interconnection) 開放系統互連
OSPF (Open Shortest Path First) 開放最短通路優先
PAWS (Protection Against Wrapped Sequence number) 防止回繞的序號
PDU (Protocol Data Unit) 協議數據單元
POSIX (Portable Operating System Interface) 可移植操作系統接口
PPP (Point-to-Point Protocol) 點對點協議
PSH (PuSH) TCP首部中的急迫標志
RARP (Reverse Address Resolution Protocol) 逆地址解析協議
RFC (Request For Comments) Internet的文檔，其中的少部分成為標準文檔
RIP (Routing Information Protocol) 路由信息協議
RPC (Remote Procedure Call) 遠程過程調用
RR (Resource Record) 資源記錄
RST (ReSeT) TCP首部中的復位標志
RTO (Retransmission Time Out) 重傳超時
RTT (Round-Trip Time) 往返時間
SACK (Selective ACKnowledgment) 有選擇的確認
SLIP (Serial Line Internet Protocol) 串行線路I n t e r n e t協議
SMI (Structure of Management Information) 管理信息結構
SMTP (Simple Mail Transfer Protocol) 簡單郵件傳送協議
SNMP (Simple Network Management Protocol) 簡單網絡管理協議
SSAP (Source Service Access Point) 源服務訪問點
SSRR (Strict Source and Record Route) 嚴格的源站及記錄路由
SWS (Silly Window Syndrome) 糊涂窗口綜合癥
SYN (SYNchronous) TCP首部中的同步序號標志
TCP (Transmission Control Protocol) 傳輸控制協議
TFTP (Trivial File Transfer Protocol) 簡單文件傳送協議
TLI (Transport Layer Interface) 運輸層接口
TTL (Ti m e - To-Live) 生存時間或壽命
TUBA (TCP and UDP with Bigger Addresses) 具有更長地址的T C P和U D P
Telnet 遠程終端協議
UA (User Agent) 用戶代理
UDP (User Datagram Protocol) 用戶數據報協議
URG (URGent) TCP首部中的緊急指針標志
UTC (Coordinated Universal Time) 協調的統一時間
UUCP (Unix-to-Unix CoPy) Unix到U n i x的復制
WAN (Wide Area Network) 廣域網
WWW (World Wide Web) 萬維網
XDR (eXternal Data Representation) 外部數據表示
XID (transaction ID) 事務標識符
XTI (X/Open Transport Layer Interface) X/ O p e n運輸層接口
標簽：
tcp
協議
上傳時間：
2013-11-13
上傳用戶：tdyoung
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The LPC2292/2294 microcontrollers are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 256 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 pct with minimal performance penalty.
With their 144-pin package, low power consumption, various 32-bit timers, 8-channel 10-bit ADC, 2/4 (LPC2294) advanced CAN channels, PWM channels and up to nine external interrupt pins these microcontrollers are particularly suitable for automotive and industrial control applications as well as medical systems and fault-tolerant maintenance buses. The number of available fast GPIOs ranges from 76 (with external memory) through 112 (single-chip). With a wide range of additional serial communications interfaces, they are also suited for communication gateways and protocol converters as well as many other general-purpose applications.
Remark: Throughout the data sheet, the term LPC2292/2294 will apply to devices with and without the /00 or /01 suffix. The suffixes /00 and /01 will be used to differentiate from other devices only when necessary.
標簽：
lpc
datasheet
2292
2294
上傳時間：
2014-12-30
上傳用戶：aysyzxzm
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Single-Ended and Differential S-Parameters
Differential circuits have been important incommunication systems for many years. In the past,differential communication circuits operated at lowfrequencies, where they could be designed andanalyzed using lumped-element models andtechniques. With the frequency of operationincreasing beyond 1GHz, and above 1Gbps fordigital communications, this lumped-elementapproach is no longer valid, because the physicalsize of the circuit approaches the size of awavelength.Distributed models and analysis techniques are nowused instead of lumped-element techniques.Scattering parameters, or S-parameters, have beendeveloped for this purpose [1]. These S-parametersare defined for single-ended networks. S-parameterscan be used to describe differential networks, but astrict definition was not developed until Bockelmanand others addressed this issue [2]. Bockelman’swork also included a study on how to adapt single-ended S-parameters for use with differential circuits[2]. This adaptation, called “mixed-mode S-parameters,” addresses differential and common-mode operation, as well as the conversion betweenthe two modes of operation.This application note will explain the use of single-ended and mixed-mode S-parameters, and the basicconcepts of microwave measurement calibration.
標簽：
差分電路
單端
模式
上傳時間：
2014-03-25
上傳用戶：yyyyyyyyyy
-
Abstract: Using a wafer-level package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and, ifnot carefully planned, result in an unreliable design. This article presents some PCB designconsiderations and general recommendations for choosing a 0.4mm- or 0.5mm-pitch WLP for yourapplication.
標簽：
Considerations
Guidelines
and
Design
上傳時間：
2013-11-09
上傳用戶：ls530720646
-
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
標簽：
封裝
器件
用戶
賽靈思
上傳時間：
2013-11-21
上傳用戶：不懂夜的黑
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In the past decade, the size and complexity of manyFPGA designs exceeds the time and resourcesavailable to most design teams, making the use andreuse of Intellectual Property (IP) imperative.However, integrating numerous IP blocks acquiredfrom both internal and external sources can be adaunting challenge that often extends, rather thanshortens, design time. As today's designs integrateincreasing amounts of functionality, it is vital thatdesigners have access to proven, up-to-date IP fromreliable sources.
標簽：
AXI4
379
wp
即插即用
上傳時間：
2013-11-11
上傳用戶：csgcd001
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This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing Spartan configuration.In particular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream over a network.
標簽：
Spartan
XAPP
FPGA
098
上傳時間：
2013-11-01
上傳用戶：wojiaohs
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This application note describes the implementation of a two-dimensional Rank Order filter. Thereference design includes the RTL VHDL implementation of an efficient sorting algorithm. Thedesign is parameterizable for input/output precision, color standards, filter kernel size,maximum horizontal resolution, and implementation options. The rank to be selected can bemodified dynamically, and the actual horizontal resolution is picked up automatically from theinput synchronization signals. The design has a fully synchronous interface through the ce, clk,and rst ports.
標簽：
XAPP
953
二維
濾波器
上傳時間：
2013-12-14
上傳用戶：逗逗666
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WP369可擴展式處理平臺-各種嵌入式系統的理想解決方案 ：Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.
標簽：
369
WP
擴展式
處理平臺
上傳時間：
2013-10-18
上傳用戶：cursor
