資料->【E】光盤論文->【E1】斯坦福博士論文->03 California PhD High integrity GPS-INS filter for precise relative navigation.pdf
標(biāo)簽： California navigation integrity relative
上傳時(shí)間： 2013-07-03
上傳用戶：jiiszha
FPGA-based high-order FIR filter design
標(biāo)簽： FPGA-based high-order filter design
上傳時(shí)間： 2013-08-06
上傳用戶：sssnaxie
Introduce High-Speed Digital System Design.
標(biāo)簽： High-Speed Digital Design System
上傳時(shí)間： 2013-10-20
上傳用戶：gps6888
Abstract: This application note describes how sampling clock jitter (time interval error or "TIE jitter") affectsthe performance of delta-sigma digital-to-analog converters (DACs). New insights explain the importanceof separately specifying low-frequency (< 2x passband frequency) and high-frequency or wideband (> 2xpassband frequency) jitter tolerance in these devices. The article also provides an application example ofa simple highly jittered cycle-skipped sampling clock and describes a method for generating a properbroadband jittered clock. The document then goes on to compare Maxim's audio DAC jitter tolerance tocompetitor audio DACs. Maxim's exceptionally high jitter tolerance allows very simple and low-cost sampleclock implementations.
標(biāo)簽： DAC 音頻 數(shù)模轉(zhuǎn)換器 抖動(dòng)
上傳時(shí)間： 2013-10-25
上傳用戶：banyou
Photodiodes can be broken into two categories: largearea photodiodes with their attendant high capacitance(30pF to 3000pF) and smaller area photodiodes withrelatively low capacitance (10pF or less). For optimalsignal-to-noise performance, a transimpedance amplifi erconsisting of an inverting op amp and a feedback resistoris most commonly used to convert the photodiode currentinto voltage. In low noise amplifi er design, large areaphotodiode amplifi ers require more attention to reducingop amp input voltage noise, while small area photodiodeamplifi ers require more attention to reducing op amp inputcurrent noise and parasitic capacitances.
上傳時(shí)間： 2013-10-28
上傳用戶：hanbeidang
Digital-to-analog converters (DACs) are prevalent inindustrial control and automated test applications.General-purpose automated test equipment often requiresmany channels of precisely controlled voltagesthat span several voltage ranges. The LTC2704 is ahighly integrated 16-bit, 4-channel DAC for high-endapplications. It has a wide range of features designed toincrease performance and simplify design.
上傳時(shí)間： 2013-11-22
上傳用戶：元宵漢堡包
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
標(biāo)簽： pci PCB 設(shè)計(jì)規(guī)范
上傳時(shí)間： 2013-10-15
上傳用戶：busterman
Achieving High Power Density Designs
標(biāo)簽： Achieving Density Designs Power
上傳時(shí)間： 2013-10-12
上傳用戶：qazxsw
While simplicity and high effi ciency (for cool running) areno longer optional features in isolated power supplies, itis traditionally diffi cult to achieve both. Achieving higheffi ciency often requires the use of advanced topologiesand home-brewed secondary synchronous rectifi cationschemes once reserved only for higher power applications.This only adds to the parts count and to the designcomplexity associated with the reference and optocouplercircuits typically used to maintain isolation. Fortunately, abreakthrough IC makes it possible to achieve both high efficiency and simplicity in a synchronous fl yback topology.The LT®3825 simplifi es and improves the performance oflow voltage, high current fl yback supplies by providingprecise synchronous rectifi er timing and eliminating theneed for optocoupler feedback while maintaining excellentregulation and superior loop response.
上傳時(shí)間： 2013-10-16
上傳用戶：wayne595
As environmental concerns over traditional lighting increaseand the price of LEDs decreases, high power LEDsare fast becoming a popular lighting solution for offl ineapplications. In order to meet the requirements of offl inelighting—such as high power factor, high effi ciency, isolationand TRIAC dimmer compatibility—prior LED driversused many external discrete components, resulting incumbersome solutions. The LT®3799 solves complexity,space and performance problems by integrating all therequired functions for offl ine LED lighting.
上傳時(shí)間： 2013-10-13
上傳用戶：dongqiangqiang
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