it describe how to develop the field programmable gate array
標(biāo)簽： programmable describe develop array
上傳時(shí)間： 2013-08-28
上傳用戶：zhaoq123
it consist of PCF8583 assembly driver, Proteus RTC example that is schematic, Proteus library and model files
標(biāo)簽： assembly consist driver 8583
上傳時(shí)間： 2013-09-25
上傳用戶：1477849018@qq.com
X電容是指跨于L-N之間的電容器， Y電容是指跨于L-G/N-G之間的電容器。(L=Line, N=Neutral, G=Ground).
標(biāo)簽： 電容
上傳時(shí)間： 2014-12-23
上傳用戶：haohao
X電容和Y電容的使用及注意方法
上傳時(shí)間： 2013-11-22
上傳用戶：sevenbestfei
介紹X,Y電容的一片通俗易懂的資料
標(biāo)簽： 電容
上傳時(shí)間： 2013-10-30
上傳用戶：teddysha
In this document, the term Ô60xÕ is used to denote a 32-bit microprocessor from the PowerPC architecture family that conforms to the bus interface of the PowerPC 601ª, PowerPC 603ª, or PowerPC 604 microprocessors. Note that this does not include the PowerPC 602ª microprocessor which has a multiplexed address/data bus. 60x processors implement the PowerPC architecture as it is speciÞed for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits,and ßoating-point data types of 32 and 64 bits (single-precision and double-precision).1.1 Overview The MPC106 provides an integrated high-bandwidth, high-performance, TTL-compatible interface between a 60x processor, a secondary (L2) cache or additional (up to four total) 60x processors, the PCI bus,and main memory. This section provides a block diagram showing the major functional units of the 106 and describes brießy how those units interact.Figure 1 shows the major functional units within the 106. Note that this is a conceptual block diagram intended to show the basic features rather than an attempt to show how these features are physically implemented on the device.
標(biāo)簽： Bridge Memory Contr MPC
上傳時(shí)間： 2013-10-08
上傳用戶：18711024007
摘 要 瞬態(tài)仿真領(lǐng)域的許多工作需要獲得可視化數(shù)據(jù), 仿真電路不能將輸出參數(shù)繪制成圖形時(shí)研究工作將受到很大影響. 而權(quán)威電路仿真軟件PSpice 在這個(gè)方面不盡如人意. 本文提出了一種有效的解決辦法: 通過MATLAB 編程搭建一個(gè)PSpice 與MATLAB 的數(shù)據(jù)接口,使PSpice輸出數(shù)據(jù)文件可以導(dǎo)入到MATLAB中繪制圖形. 這令我們能夠很方便地獲得數(shù)據(jù)的規(guī)律以有效地分析仿真結(jié)果, 這項(xiàng)技術(shù)對于教學(xué)和工程實(shí)踐都有比較實(shí)際的幫助.關(guān)鍵詞: 瞬態(tài)仿真 仿真程序 PSpice MATLAB 可視化數(shù)據(jù)The Data Transfer from Pspice to MATLABWu hao Ning yuanzhong Liang yingAbstract Many works in the area of transient simulation has shown how a emulator such asPSpice can be interfaced to an control analysis package such as MATLAB to get viewdata. Thepaper describes how such interfaces can be made using the MATLAB programming. The platformas a typical platform will solve the problem that PSpice software sometimes can not draw the datato a picture. It can make us find the rule from numerous data very expediently, so we can analyzethe outcome of the simulation. And it also can be used in the field of education.Keywords Transient Simulation Emulator PSpice MATLAB Viewdata1 引言科學(xué)研究和工程應(yīng)用常需要進(jìn)行電路仿真 PSpice可進(jìn)行直流 交流 瞬態(tài)等基本電路特性分析 也可進(jìn)行蒙托卡諾 MC 統(tǒng)計(jì)分析 最壞情況 Wcase 分析 優(yōu)化設(shè)計(jì)等復(fù)雜電路特性分析 它是國際上仿真電路的權(quán)威軟件 而MATLAB的主要特點(diǎn)有 高效方便的矩陣和數(shù)組運(yùn)算 編程效率高 結(jié)構(gòu)化面向?qū)ο?方便的繪圖功能 用戶使用方便 工具箱功能強(qiáng)大 兩者各有著重點(diǎn) 兩種軟件結(jié)合應(yīng)用 對研究工作有很重要的意義香港理工大學(xué)Y. S. LEE 等人首先將PSpice和MATLAB結(jié)合 開發(fā)了電力電子電路優(yōu)化用的CAD 程序MATSPICE[6] 將兩者相結(jié)合的關(guān)鍵在于 如何用MATLAB 獲取PSpice的仿真數(shù)據(jù) 對此參考文獻(xiàn) 6 里沒有詳細(xì)敘述 本文著重說明用MATLAB 讀取PSpice仿真數(shù)據(jù)的具體方法本論文利用MATLAB對PSpice仿真出的數(shù)據(jù)處理繪制出后者無法得到或是效果不好的仿真圖形 下面就兩者結(jié)合使用的例子 進(jìn)行具體說明
標(biāo)簽： MATLAB PSpice 數(shù)據(jù) 接口技術(shù)
上傳時(shí)間： 2013-10-20
上傳用戶：wuchunzhong
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標(biāo)簽： UltraScale Xilinx 架構(gòu)
上傳時(shí)間： 2013-11-13
上傳用戶：瓦力瓦力hong
通過比較各種隔離數(shù)字通信的特點(diǎn)和應(yīng)用范圍，指出塑料光纖在隔離數(shù)字通信中的優(yōu)勢。使用已經(jīng)標(biāo)準(zhǔn)化的TOSLINK接口，有利于節(jié)省硬件開發(fā)成本和簡化設(shè)計(jì)難度。給出了塑料光纖的硬件驅(qū)動(dòng)電路，說明設(shè)計(jì)過程中的注意事項(xiàng)，對光收發(fā)模塊的電壓特性和頻率特性進(jìn)行全面試驗(yàn)，并給出SPI口使用塑料光纖隔離通信的典型應(yīng)用電路圖。試驗(yàn)結(jié)果表明，該設(shè)計(jì)可為電力現(xiàn)場、電力電子及儀器儀表的設(shè)計(jì)提供參考。 Abstract: y comparing characteristics and applications area of various isolated digital communications， this article indicates advantages of plastic optical fiber in isolated digital communications. Using the standardized TOSLINK interface， it helps to control costs and difficulty in hardware development and design. Then it gives the hardware driver circuit of plastic optical fiber module， explains the noticed details in design process， gives results on the basis of the optical transceiver module voltage characteristics and frequency characteristics tests. Finally，it gives typical application circuit of the SPI communication port by using plastic optical fiber isolation .The results show that this design can be referenced for the power field， power electronics and instrumentation design.
標(biāo)簽： 塑料光纖 高壓隔離 通信 接口設(shè)計(jì)
上傳時(shí)間： 2014-01-10
上傳用戶：gundan
買的開發(fā)板上帶的52個(gè)應(yīng)用于實(shí)物的程序，希望對大家有幫助
標(biāo)簽： 單片機(jī)開發(fā)板 c語言 程序 源代碼
上傳時(shí)間： 2013-11-04
上傳用戶：xymbian
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