-
AVR32801: UC3A3 Schematic Checklist Features • Power circuit • Reset circuit • USB connection • External bus interface • ABDAC sound DAC interface • JTAG and Nexus debug ports • Clocks and crystal oscillators • MMC, SD-card, SDHC, SDIO and CE-ATA interface 1 Introduction A good hardware design comes from a proper schematic. Since UC3A3 devices have a fair number of pins and functions, the schematic for these devices can be large and quite complex. This application note describes a common checklist which should be used when starting and reviewing the schematics for a UC3A3 design.
標簽：
Schematic
32801
UC3A3
Chec
上傳時間：
2014-12-26
上傳用戶：DXM35
-
Virtex-5, Spartan-DSP FPGAs Application note
This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step instruction is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.
標簽：
Spartan-DSP
Virtex
FPGAs
Ap
上傳時間：
2013-10-23
上傳用戶：raron1989
-
This application note describes how to decode standard DTMF tones using the minimum number of external discrete components and a PIC. The two examples use a PIC which has an 8 bit timer and either a comparator or an ADC, although it can be modified for use on a PIC which has only digital I/O. The Appendices have example code for the 16C662 (with comparator) and 16F877 (using the ADC).
As the majority of the Digital Signal Processing is done in software, little is required in the way of external signal conditioning. Software techniques are used to model the individual elements of a DTMF Decoder IC.
標簽：
Decoding
DTMF
with
PIC
上傳時間：
2013-11-21
上傳用戶：zhaoke2005
-
The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallelInput/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed toenhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvementsinclude higher drive capability, 5 V I/O tolerance, lower supply current, individual I/Oconfiguration, and smaller packaging. I/O expanders provide a simple solution whenadditional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.The PCA9555 consists of two 8-bit Configuration (Input or Output selection); Input, Outputand Polarity Inversion (active HIGH or active LOW operation) registers. The systemmaster can enable the I/Os as either inputs or outputs by writing to the I/O configurationbits. The data for each Input or Output is kept in the corresponding Input or Outputregister. The polarity of the read register can be inverted with the Polarity Inversionregister. All registers can be read by the system master. Although pin-to-pin and I2C-busaddress compatible with the PCF8575, software changes are required due to theenhancements, and are discussed in Application note AN469.
標簽：
C-bus
9555
SMBu
PCA
上傳時間：
2013-11-13
上傳用戶：fredguo
-
Luminary Micro Stellaris™ microcontrollers that are equipped with an analog-to-digital converter(ADC), use an innovative sequence-based sampling architecture designed to be extremely flexible,yet easy to use. This application note describes the sampling architecture of the ADC. Sinceprogrammers can configure Stellaris microcontrollers either through the powerful StellarisFamilyDriver Library or through direct writes to the device's control registers, this application note describesboth methods. The information presented in this document is intended to complement the ADCchapter of the device datasheet, and assumes the reader has a basic understanding of howADCsfunction.
標簽：
Microcontr
Stellaris
Using
the
上傳時間：
2013-10-14
上傳用戶：blans
-
The P82B715 I2C Buffer was designed toextend the range of the local I2C bus out to50 Meters. This application note describesthe results of testing the buffer on severaldifferent types of cables to determine themaximum operating distances possible. Theresults are summarized in a table for easyreference.
標簽：
extender
P82B715
Using
I2C
上傳時間：
2014-12-28
上傳用戶：lou45566
-
PCA9511, PCA9512, PCA9513, PCA9514, PCA9515, PCA9516, PCA9518,P82B96, P82B715Abstract - Philips Semiconductors family of Repeaters, Hubs and Expanders are detailed in this application notethat discusses device operation, maximum cable length and frequency calculations and typical applications.
標簽：
REPEATERS
SMBus
255
AN
上傳時間：
2013-11-21
上傳用戶：wlcaption
-
Designing Boards with Atmel AT89C51, AT89C52, AT89C1051, and AT89C2051 for Writing Flash at In-Circuit Test:Recent improvements in chips andtesters have made it possible for thetester to begin taking over the role traditionallyassigned to the PROM programmer.Instead of having a PROM programmerwrite nonvolatile memoriesbefore assembling the board, the in-circuittester writes them during in-circuittesting operations. Many Teradyne Z18-series testers are now in use loadingcode into nonvolatile memories, microcontrollersand in-circuit programmable logic devices. The purpose of this note is to explain how the Z18 approaches the writing task for Atmel AT89C series IC’s,so that designers of boards using these chips can get the best results.
標簽：
Designing
Boards
Atmel
with
上傳時間：
2013-11-20
上傳用戶：lijianyu172
-
In this document, the term Ô60xÕ is used to denote a 32-bit microprocessor from the PowerPC architecture family that conforms to the bus interface of the PowerPC 601ª, PowerPC 603ª, or PowerPC 604 microprocessors. note that this does not include the PowerPC 602ª microprocessor which has a multiplexed address/data bus. 60x processors implement the PowerPC architecture as it is speciÞed for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits,and ßoating-point data types of 32 and 64 bits (single-precision and double-precision).1.1 Overview The MPC106 provides an integrated high-bandwidth, high-performance, TTL-compatible interface between a 60x processor, a secondary (L2) cache or additional (up to four total) 60x processors, the PCI bus,and main memory. This section provides a block diagram showing the major functional units of the 106 and describes brießy how those units interact.Figure 1 shows the major functional units within the 106. note that this is a conceptual block diagram intended to show the basic features rather than an attempt to show how these features are physically implemented on the device.
標簽：
Bridge
Memory
Contr
MPC
上傳時間：
2013-10-08
上傳用戶：18711024007
-
The μPSD32xx family, from ST, consists of Flash programmable system devices with a 8032 MicrocontrollerCore. Of these, the μPSD3234A and μPSD3254A are notable for having a complete implementationof the USB hardware directly on the chip, complying with the Universal Serial Bus Specification, Revision1.1.This application note describes a demonstration program that has been written for the DK3200 hardwaredemonstration kit (incorporating a μPSD3234A device). It gives the user an idea of how simple it is to workwith the device, using the HID class as a ready-made device driver for the USB connection.IN-APPLICATION-PROGRAMMING (IAP) AND IN-SYSTEM-PROGRAMMING (ISP)Since the μPSD contains two independent Flash memory arrays, the Micro Controller Unit (MCU) can executecode from one memory while erasing and programming the other. Product firmware updates in thefield can be reliably performed over any communication channel (such as CAN, Ethernet, UART, J1850)using this unique architecture. For In-Application-Programming (IAP), all code is updated through theMCU. The main advantage for the user is that the firmware can be updated remotely. The target applicationruns and takes care on its own program code and data memory.IAP is not the only method to program the firmware in μPSD devices. They can also be programmed usingIn-System-Programming (ISP). A IEEE1149.1-compliant JTAG interface is included on the μPSD. Withthis, the entire device can be rapidly programmed while soldered to the circuit board (Main Flash memory,Secondary Boot Flash memory, the PLD, and all configuration areas). This requires no MCU participation.The MCU is completely bypassed. So, the μPSD can be programmed or reprogrammed any time, anywhere, even when completely uncommitted.Both methods take place with the device in its normal hardware environment, soldered to a printed circuitboard. The IAP method cannot be used without previous use of ISP, because IAP utilizes a small amountof resident code to receive the service commands, and to perform the desired operations.
標簽：
Demonstration
3200
USB
for
上傳時間：
2014-02-27
上傳用戶：zhangzhenyu
