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parallel-plate

  • 74LS164.pdf

    英文描述: 8-Bit Serial-Input/Parallel-Output Shift Register 中文描述: 8位Serial-Input/Parallel-Output移位寄存器

    標簽: 164 74 LS

    上傳時間: 2013-04-24

    上傳用戶:epson850

  • 74LS165.pdf

    英文描述: 8-Bit Parallel In/Serial Output Shift Registers 中文描述: 8位并行/串行輸出移位寄存器

    標簽: 165 74 LS

    上傳時間: 2013-06-03

    上傳用戶:林魚2016

  • 汽車牌照的自動定位和識別程序源代碼

    ·詳細說明:汽車牌照的自動定位和識別程序源代碼-source code for automatic license plate location and recognition文件列表:   車牌定位   ........\ChildFrm.cpp   ........\ChildFrm.h   ........\ColorTable.h   ...

    標簽: 汽車牌照 自動定位 程序 源代碼

    上傳時間: 2013-05-18

    上傳用戶:Divine

  • 學習USB2.0驅動程序設計源碼

    ·詳細說明:學習USB2.0驅動程序設計源碼,包括Windows DDK Driver驅動的詳細設計,U盤,MP3的程序設計例子- Studies the USB2.0 driver design source code, including Windows DDK Driver actuation detailed design, U plate, MP3 programming example

    標簽: USB 2.0 驅動 程序設計

    上傳時間: 2013-06-04

    上傳用戶:宋桃子

  • 數據采集電路分析

      This application note features 8-, 10-, and 12-bit dataacquisition components in various circuit configurations.The circuits include battery monitoring, temperature sensing,isolated serial interfaces, and microprocessor andmicrocontroller serial and parallel interfaces. Also includedare voltage reference circuits (Application Note 42contains more voltage reference circuits).

    標簽: 數據采集 電路分析

    上傳時間: 2014-01-15

    上傳用戶:zq70996813

  • CTP知識全解

      1.什么是CTP?   CTP包括幾種含義:   脫機直接制版(Computer-to-plate)   在機直接制版(Computer-to-press)   直接印刷(Computer-to-paper/print)   數字打樣(Computer-to-proof)   普通PS版直接制版技術,即CTcP(Computer-to-conventional plate)   這里所論述的CTP系統是脫機直接制版(Computer-to-plate)。CTP就是計算機直接到印版,是一種數字化印版成像過程。CTP直接制版機與照排機結構原理相仿。起制版設備均是用計算機直接控制,用激光掃描成像,再通過顯影、定影生成直接可上機印刷的印版。計算機直接制版是采用數字化工作流程,直接將文字、圖象轉變為數字,直接生成印版,省去了膠片這一材料、人工拼版的過程、半自動或全自動曬版工序。

    標簽: CTP

    上傳時間: 2013-10-27

    上傳用戶:baiom

  • C8051F020

    HIGH SPEED 8051 μC CORE - Pipe-lined Instruction Architecture; Executes 70% of Instructions in 1 or 2 System Clocks - Up to 25MIPS Throughput with 25MHz System Clock - 22 Vectored Interrupt Sources MEMORY - 4352 Bytes Internal Data RAM (256 + 4k) - 64k Bytes In-System Programmable FLASH Program Memory - External Parallel Data Memory Interface – up to 5Mbytes/sec DIGITAL PERIPHERALS - 64 Port I/O; All are 5V tolerant - Hardware SMBusTM (I2CTM Compatible), SPITM, and Two UART Serial Ports Available Concurrently - Programmable 16-bit Counter/Timer Array with 5 Capture/Compare Modules - 5 General Purpose 16-bit Counter/Timers - Dedicated Watch-Dog Timer; Bi-directional Reset CLOCK SOURCES - Internal Programmable Oscillator: 2-to-16MHz - External Oscillator: Crystal, RC, C, or Clock - Real-Time Clock Mode using Timer 3 or PCA SUPPLY VOLTAGE ........................ 2.7V to 3.6V - Typical Operating Current: 10mA @ 25MHz - Multiple Power Saving Sleep and Shutdown Modes 100-Pin TQFP (64-Pin Version Available) Temperature Range: –40°C to +85°C

    標簽: C8051F020

    上傳時間: 2013-10-12

    上傳用戶:lalalal

  • PCF2116系列LCD驅動器芯片簡介及封裝庫

    1 FEATURES· Single chip LCD controller/driver· 1 or 2-line display of up to 24 characters per line, or2 or 4 lines of up to 12 characters per line· 5 ′ 7 character format plus cursor; 5 ′ 8 for kana(Japanese syllabary) and user defined symbols· On-chip:– generation of LCD supply voltage (external supplyalso possible)– generation of intermediate LCD bias voltages– oscillator requires no external components (externalclock also possible)· Display data RAM: 80 characters· Character generator ROM: 240 characters· Character generator RAM: 16 characters· 4 or 8-bit parallel bus or 2-wire I2C-bus interface· CMOS/TTL compatible· 32 row, 60 column outputs· MUX rates 1 : 32 and 1 : 16· Uses common 11 code instruction set· Logic supply voltage range, VDD - VSS: 2.5 to 6 V· Display supply voltage range, VDD - VLCD: 3.5 to 9 V· Low power consumption· I2C-bus address: 011101 SA0.

    標簽: 2116 PCF LCD 驅動器芯片

    上傳時間: 2013-11-08

    上傳用戶:laozhanshi111

  • SN65LBC170,SN75LBC170,pdf(TRIP

    The SN65LBC170 and SN75LBC170 aremonolithic integrated circuits designed forbidirectional data communication on multipointbus-transmission lines. Potential applicationsinclude serial or parallel data transmission, cabledperipheral buses with twin axial, ribbon, ortwisted-pair cabling. These devices are suitablefor FAST-20 SCSI and can transmit or receivedata pulses as short as 25 ns, with skew lessthan 3 ns.These devices combine three 3-state differentialline drivers and three differential input linereceivers, all of which operate from a single 5-Vpower supply.The driver differential outputs and the receiverdifferential inputs are connected internally to formthree differential input/output (I/O) bus ports thatare designed to offer minimum loading to the buswhenever the driver is disabled or VCC = 0. Theseports feature a wide common-mode voltage rangemaking the device suitable for party-lineapplications over long cable runs.

    標簽: 170 LBC SN TRIP

    上傳時間: 2013-10-13

    上傳用戶:ytulpx

  • FET430PIF自制資料

    The MSP-FET430PIF is a Parallel Port interface (does not include target board) that is used to program and debug MSP430 FET tools and test boards through the JTAG interface. This interface is included in our FET tools, but sold without the development board. This interface uses a Parallel PC Port to communicate to the Debugger Software (IAR Kickstart software included) running on the PC. The interface uses the standard 14 pin header to communicate to the MSP430 device using the standard JTAG protocol. The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is extremely low power, no external power supply is required. The tool has an integrated software environment and connects directly to the PC which greatly simplifies the set-up and use of the tool. The flash development tool supports development with all MSP430 flash parts. Features MSP430 debugging interface to connect a MSP430-Flash-device to a Parallel port on a PC Supports JTAG debug protocol (NO support for Spy-Bi-Wire (2-wire JTAG) debug protocol, Spy-Bi-Wire (2-wire JTAG) is supported by MSP-FET430UIF) Parallel Port cable and a 14-conductor target cable Full documentation on CD ROM Integrated IAR Kickstart user interface which includes: Assembler Linker Limulator Source-level debugger Limited C-compiler Technical specifications: Backwardly compatable with existing FET tool boards.

    標簽: FET 430 PIF

    上傳時間: 2013-10-26

    上傳用戶:fengweihao158@163.com

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