www工具包. 這是W3C官方支持的www支撐庫. 其中提供通用目的的客戶端的WebAPI: complete HTTP/1.1 (with caching, pipelining, PUT, POST, Digest Authentication, deflate, etc), MySQL logging, FTP, HTML/4, XML (expat), RDF (SiRPAC), WebDAV, and much more
標簽： pipelining www complete caching
上傳時間： 2017-02-24
上傳用戶：qq21508895
各系列I/O型單片機使用手冊 第一部份 單片機概論 1第一章 硬件結構 3簡介3特性4技術特性4內核特性4周邊特性5選擇表6系統框線圖7引腳分配8引腳說明10極限參數15直流電氣特性16交流電氣特性18EEPROM 交流電氣特性18系統結構圖19時序和流水線結構(pipelining) 19程序計數器21堆棧23算術及邏輯單元 – ALU24MTP 程序存儲器25結構25特殊向量26查表27查表程序范例28在線燒寫30數據存儲器31結構31通用數據存儲器32專用數據存儲器32
上傳時間： 2013-10-15
上傳用戶：yimoney
A/D 型單片機使用說明書/手冊 第一部份 單片機概論.................................................................. 1第一章 硬件結構........................................................................................ 3簡介..............................................................................................................3特性..............................................................................................................4技術特性..............................................................................................4內核特性..............................................................................................4周邊特性..............................................................................................5選擇表..........................................................................................................5系統框線圖..................................................................................................6引腳分配......................................................................................................7引腳說明......................................................................................................8極限參數....................................................................................................12直流電氣特性............................................................................................13交流電氣特性............................................................................................14系統結構....................................................................................................15時序和流水線結構(pipelining) .........................................................15程序計數器........................................................................................17堆棧....................................................................................................19算術及邏輯單元 – ALU...................................................................20程序存儲器................................................................................................21結構....................................................................................................21特殊向量............................................................................................22查表....................................................................................................23查表程序范例....................................................................................23數據存儲器................................................................................................25結構....................................................................................................25通用數據存儲器................................................................................26專用數據存儲器................................................................................27
上傳時間： 2014-12-27
上傳用戶：youlongjian0
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽： UltraScale Xilinx 架構
上傳時間： 2013-11-13
上傳用戶：瓦力瓦力hong
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽： UltraScale Xilinx 架構
上傳時間： 2013-11-21
上傳用戶：wxqman
