-
Comparison between planar beam with Gaussian beam
標(biāo)簽：
beam
Comparison
Gaussian
between
上傳時間：
2013-12-24
上傳用戶：wxhwjf
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Silicon NPN epitaxial planar type For switching/digital circuits
標(biāo)簽：
epitaxial
switching
circuits
Silicon
上傳時間：
2014-01-06
上傳用戶：zhaiyanzhong
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Input : A set S of planar points
Output : A convex hull for S
Step 1: If S contains no more than five points, use exhaustive searching to find the convex hull and return.
Step 2: Find a median line perpendicular to the X-axis which divides S into SL and SR SL lies to the left of SR .
Step 3: Recursively construct convex hulls for SL and SR. Denote these convex hulls by Hull(SL) and Hull(SR) respectively.
Step 4: Apply the merging procedure to merge Hull(SL) and Hull(SR) together to form a convex hull.
Time complexity:
T(n) = 2T(n/2) + O(n)
= O(n log n)
標(biāo)簽：
contains
Output
convex
planar
上傳時間：
2017-02-19
上傳用戶：wyc199288
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中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html
Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture
The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.
The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.
Some of the UltraScale architecture breakthroughs include:
• Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%
• Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability
• Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization
• 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard
• Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets
• Greatly enhanced DSP and packet handling
The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標(biāo)簽：
UltraScale
Xilinx
架構(gòu)
上傳時間：
2013-11-13
上傳用戶：瓦力瓦力hong
-
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html
Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture
The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.
The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.
Some of the UltraScale architecture breakthroughs include:
• Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%
• Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability
• Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization
• 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard
• Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets
• Greatly enhanced DSP and packet handling
The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標(biāo)簽：
UltraScale
Xilinx
架構(gòu)
上傳時間：
2013-11-21
上傳用戶：wxqman
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The module LSQ is for unconstrained linear least-squares fitting. It is
based upon Applied Statistics algorithm AS 274 (see comments at the start
of the module). A planar-rotation algorithm is used to update the QR-
factorization. This makes it suitable for updating regressions as more
data become available. The module contains a test for singularities which
is simpler and quicker than calculating the singular-value decomposition.
An important feature of the algorithm is that it does not square the condition
number. The matrix X X is not formed. Hence it is suitable for ill-
conditioned problems, such as fitting polynomials.
By taking advantage of the MODULE facility, it has been possible to remove
many of the arguments to routines. Apart from the new function VARPRD,
and a back-substitution routine BKSUB2 which it calls, the routines behave
as in AS 274.
標(biāo)簽：
least-squares
unconstrained
Statisti
Applied
上傳時間：
2015-05-14
上傳用戶：aig85
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A one-dimensional calibration object consists of three or more collinear points with known relative positions.
It is generally believed that a camera can be calibrated only when a 1D calibration object is in planar motion or rotates
around a ¯ xed point. In this paper, it is proved that when a multi-camera is observing a 1D object undergoing general
rigid motions synchronously, the camera set can be linearly calibrated. A linear algorithm for the camera set calibration
is proposed，and then the linear estimation is further re¯ ned using the maximum likelihood criteria. The simulated and
real image experiments show that the proposed algorithm is valid and robust.
標(biāo)簽：
one-dimensional
calibration
collinear
consists
上傳時間：
2014-01-12
上傳用戶：璇珠官人
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Matlab 畫三維立體圖形
The aim of geom3d library is to handle and visualize 3D geometric primitives
such as points, lines, planes, polyhedra... It provides low-level functions
for manipulating 3D geometric primitives, making easier the development of more
complex geometric algorithms.
Some features of the library are:
- creation of various shapes (3D points, 3D lines, planes, polyhedra...)
through an intuitive syntax.
Ex: createPlane(p1, p2, p3) to create a plane through 3 points.
- derivation of new shapes: intersection between 2 planes, intersection between
a plane and a line, between a sphere and a line...
- functions for 3D polygons and polyhedra. Polyhedra use classical vertex-faces
arrays (face array contain indices of vertices), and support faces with any
number of vertices. Some basic models are provided (createOctaedron,
createCubeoctaedron...), as well as some computation (like faceNormal or
centroid)
- manipulation of planar transformation. Ex.:
ROT = createRotationOx(THETA);
P2 = transformPoint3d(P1, ROT);
- direct drawing of shapes with specialized functions. Clipping is performed
automatically for infinite shapes such as lines or rays. Ex:
drawPoint3d([50 50 25; 20 70 10], 'ro'); % draw some points
drawLine3d([X0 Y0 Z0 DX DY DZ]); % clip and draw straight line
Some functions require the geom2d package.
Additional help is provided in geom3d/Contents.m file, as well as summary files
like 'points3d.m' or 'lines3d.m'.
標(biāo)簽：
Matlab 畫三維立體圖形
上傳時間：
2015-11-02
上傳用戶：A1321
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An optical fiber amplifier is a key component for enabling efficient transmission of
wavelength-divisionmultiplexed(WDM)signalsoverlongdistances.Eventhough
many alternative technologies were available, erbium-doped fiber amplifiers won
theraceduringtheearly1990sandbecameastandardcomponentforlong-haulopti-
caltelecommunicationssystems.However,owingtotherecentsuccessinproducing
low-cost, high-power, semiconductor lasers operating near 1450 nm, the Raman
amplifiertechnologyhasalsogainedprominenceinthedeploymentofmodernlight-
wavesystems.Moreover,becauseofthepushforintegratedoptoelectroniccircuits,
semiconductor optical amplifiers, rare-earth-doped planar waveguide amplifiers,
and silicon optical amplifiers are also gaining much interest these days.
標(biāo)簽：
Propagation
Light
Media
Gain
in
上傳時間：
2020-05-27
上傳用戶：shancjb
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A kinematically redundant manipulator is a serial robotic arm that has more
independently driven joints than are necessary to define the desired pose (position
and orientation) of its end-effector. With this definition, any planar manipulator (a
manipulator whose end-effector motion is restrained in a plane) with more than
three joints is a redundant manipulator. Also, a manipulator whose end-effector can
accept aspatialposeisaredundant manipulator ifithas morethan sixindependently
driven joints. For example, the manipulator shown in Fig. 1.1 has two 7-DOF arms
mounted on a torso with three degrees of freedom (DOFs). This provides 10 DOFs
for each arm. Since the end-effector of each arm can have a spatial motion with six
DOFs, the arms are redundant.
標(biāo)簽：
Autonomous
Modeling
Planning
Robots
Path
上傳時間：
2020-06-10
上傳用戶：shancjb
