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  • 基于FPGA的光纖光柵解調系統的研究

     波長信號的解調是實現光纖光柵傳感網絡的關鍵,基于現有的光纖光柵傳感器解調方法,提出一種基于FPGA的雙匹配光纖光柵解調方法,此系統是一種高速率、高精度、低成本的解調系統,并且通過引入雙匹配光柵有效地克服了雙值問題同時擴大了檢測范圍。分析了光纖光柵的測溫原理并給出了該方案軟硬件設計,綜合考慮系統的解調精度和FPGA的處理速度給出了基于拉格朗日的曲線擬合算法。 Abstract:  Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network, based on several existing methods of fiber grating sensor demodulation inadequate, a two-match fiber grating demodulation method was presented. This system is a high-speed, high precision, low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA,this paper gives the curve fitting algorithm based on Lagrange.

    標簽: FPGA 光纖光柵 解調系統

    上傳時間: 2014-07-24

    上傳用戶:caiguoqing

  • Virtex-5 GTP Transceiver Wizar

    The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts

    標簽: Transceiver Virtex Wizar GTP

    上傳時間: 2013-10-23

    上傳用戶:leyesome

  • XAPP807-封裝最小的三態以太網MAC處理引擎

    The Tri-Mode Ethernet MAC (TEMAC) UltraController-II module is a minimal footprint,embedded network processing engine based on the PowerPC™ 405 (PPC405) processor coreand the TEMAC core embedded within a Virtex™-4 FX Platform FPGA. The TEMACUltraController-II module connects to an external PHY through Gigabit Media IndependentInterface (GMII) and Management Data Input/Output (MDIO) interfaces and supports tri-mode(10/100/1000 Mb/s) Ethernet. Software running from the processor cache reads and writesthrough an On-Chip Memory (OCM) interface to two FIFOs that act as buffers between thedifferent clock domains of the PPC405 OCM and the TEMAC.

    標簽: XAPP 807 MAC 封裝

    上傳時間: 2013-10-26

    上傳用戶:yuzsu

  • NIOSII用戶定制指令

    With the Altera Nios II embedded processor, you as the system designercan accelerate time-critical software algorithms by adding custominstructions to the Nios II processor instruction set. Using custominstructions, you can reduce a complex sequence of standard instructionsto a single instruction implemented in hardware. You can use this featurefor a variety of applications, for example, to optimize software innerloops for digital signal processing (DSP), packet header processing, andcomputation-intensive applications. The Nios II configuration wizard,part of the Quartus® II software’s SOPC Builder, provides a graphicaluser interface (GUI) used to add up to 256 custom instructions to theNios II processor

    標簽: NIOSII 用戶 定制 指令

    上傳時間: 2013-11-07

    上傳用戶:swing

  • 基于GPS和RFID技術的智能巡檢系統

    該系統以計算機為依托構建中央信息處理系統CIPS(Central Information Processing System),以Pocket PC作為巡檢終端PS(Portable Station),采用SQL Server 2000關系型數據庫和SQL Server CE3.0嵌入式數據庫技術,集RFID技術、GPS定位技術、信息管理、信息傳輸等多項技術于一體,完成信息在CIPS和PS之間的交互,實現巡檢信息的綜合處理。

    標簽: RFID GPS 智能巡檢系統

    上傳時間: 2013-11-16

    上傳用戶:stvnash

  • 多徑信道下OFDM系統定時同步算法

    文中在pre-FFT定時同步算法的基礎上提出一個新的定時同步算法及其改進算法,該算法利用規則集對相關函數和導函數優化的方法得以進一步減小估計方差,本文在給出其推導過程的基礎上給出了仿真結果,并與相關算法進行比較,結果表明新算法的定時估計精度較高且具有一定的魯棒性。

    標簽: OFDM 多徑信道 定時同步算法

    上傳時間: 2013-10-29

    上傳用戶:hebmuljb

  • 基于ARM的遠程無線視頻監控終端設計

    提出了一種以ARM微處理器為控制核心的遠程無線視頻監控終端的設計方案,其監控終端的硬件設計包括視頻采集處理、中央管理控制、無線傳輸3個模塊。并給出了監控終端的軟件開發平臺和開發模式的系統啟動代碼、嵌入式Linux系統移植以及驅動程序和應用程序。測試結果表明,該監控終端設計方案合理、有效,基本滿足監控需求。 Abstract:  A remote wireless video monitoring terminal design, which uses ARM microprocessor as its core control, is proposed in this paper.The hardware design of monitoring terminal system is composed of the video acquisition and processing module, the central management and control module, wireless transmission module.Meanwhile the monitoring terminal-s software development platform and development patterns are designed. Also the design of the system-s start codes, embedded Linux system-s transplantation process, driver and the corresponding applications are given. The results showed that the monitoring terminal design is reasonable, effective, basically meet monitoring requirements.

    標簽: ARM 遠程無線 視頻監控 終端設計

    上傳時間: 2013-11-13

    上傳用戶:wanqunsheng

  • LPC4300系列ARM雙核微控制器產品數據手冊

    The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cortex-M4 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC4350/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals, andincludes an internal prefetch unit that supports speculative branching. The ARMCortex-M4 supports single-cycle digital signal processing and SIMD instructions. Ahardware floating-point processor is integrated in the core.The LPC4350/30/20/10 include an ARM Cortex-M0 coprocessor, up to 264 kB of datamemory, advanced configurable peripherals such as the State Configurable Timer (SCT)and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers,Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals

    標簽: 4300 LPC ARM 雙核微控制器

    上傳時間: 2013-10-28

    上傳用戶:15501536189

  • orcad無法輸出網表問題解決方法

    ORCAD在使用的時候總會出現這樣或那樣的問題…但下這個問題比較奇怪…在ORCAD中無法輸出網表…彈出下面的錯誤….這種問題很是奇怪…Netlist Format: tango.dllDesign Name: D:\EDA_PROJECT\PROTEL99SE\YK\SV3200\MAIN.DSNERROR [NET0021] Cannot get part.[FMT0024] Ref-des not found. Possible Logical/Physical annotation conflict.[FMT0018] Errors processing intermediate file找了一天沒找到問題…終于在花了N多時間后發現問題所在…其實這個問題就是不要使用ORCAD PSPICE 庫里面的元件來畫電路圖…實際中我是用了PSPICE里面和自己制作的二種電阻和電容混合在一起…就會出現這種問題…

    標簽: orcad 無法輸出 網表

    上傳時間: 2013-11-21

    上傳用戶:zaocan888

  • 單片機12864液晶時鐘顯示程序

    12864液晶時鐘顯示程序 LCD 地址變量 ;**************變量的定義***************** RS             BIT      P2.0            ;LCD數據/命令選擇端(H/L) RW             BIT      P2.1          ;LCD讀/寫選擇端(H/L) EP             BIT      P2.2            ;LCD使能控制 PSB        EQU P2.3 RST        EQU P2.5 PRE            BIT      P1.4            ;調整鍵(K1) ADJ            BIT      P1.5            ;調整鍵(K2) COMDAT         EQU P0 LED        EQU P0.3 YEAR           DATA      18H            ;年,月,日變量 MONTH          DATA      19H DATE           DATA      1AH WEEK           DATA      1BH HOUR           DATA      1CH            ;時,分,秒,百分之一秒變量 MIN            DATA      1DH SEC            DATA      1EH SEC100         DATA      1FH STATE          DATA      23H LEAP           BIT      STATE.1            ;是否閏年標志1--閏年,0--平年 KEY_S          DATA      24H            ;當前掃描鍵值 KEY_V          DATA      25H            ;上次掃描鍵值 DIS_BUF_U0      DATA      26H            ;LCD第一排顯示緩沖區 DIS_BUF_U1      DATA      27H DIS_BUF_U2      DATA      28H DIS_BUF_U3      DATA      29H DIS_BUF_U4      DATA      2AH DIS_BUF_U5      DATA      2BH DIS_BUF_U6      DATA      2CH DIS_BUF_U7      DATA      2DH DIS_BUF_U8      DATA      2EH DIS_BUF_U9      DATA      2FH DIS_BUF_U10     DATA      30H DIS_BUF_U11     DATA      31H DIS_BUF_U12     DATA      32H DIS_BUF_U13     DATA      33H DIS_BUF_U14     DATA      34H DIS_BUF_U15     DATA      35H DIS_BUF_L0      DATA      36H            ;LCD第三排顯示緩沖區 DIS_BUF_L1      DATA      37H DIS_BUF_L2      DATA      38H DIS_BUF_L3      DATA      39H DIS_BUF_L4      DATA      3AH DIS_BUF_L5      DATA      3BH DIS_BUF_L6      DATA      3CH DIS_BUF_L7      DATA      3DH DIS_BUF_L8      DATA      3EH DIS_BUF_L9      DATA      3FH DIS_BUF_L10     DATA      40H DIS_BUF_L11     DATA      41H DIS_BUF_L12     DATA      42H DIS_BUF_L13     DATA      43H DIS_BUF_L14     DATA      44H DIS_BUF_L15     DATA      45H FLAG            DATA      46H ;1-年,2-月,3-日,4-時,5-分,6-秒,7-退出調整。 DIS_H           DATA      47H DIS_M           DATA      48H DIS_S           DATA      49H

    標簽: 12864 單片機 液晶時鐘 顯示程序

    上傳時間: 2013-11-09

    上傳用戶:xingisme

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