I2C interface, is a very powerful tool for system designers. Theintegrated protocols allow systems to be completely software defined.Software development time of different products can be reduced byassembling a library of reusable software modules. In addition, themultimaster capability allows rapid testing and alignment ofend-products via external connections to an assembly-line computer.The mask programmable 87LPC76X and its EPROM version, the87LPC76X, can operate as a master or a slave device on the I2Csmall area network. In addition to the efficient interface to thededicated function ICs in the I2C family, the on-board interfacefacilities I/O and RAM expansion, access to EEPROM andprocessor-to-processor communications.
標(biāo)簽： microcontro Using 76X LPC
上傳時(shí)間： 2013-12-30
上傳用戶：Artemis
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上傳時(shí)間： 2013-10-22
上傳用戶：ztj182002
A Computer-On-Module, or COM, is a Module with all components necessary for a bootable host computer, packaged as a super component. A COM requires a Carrier Board to bring out I/O and to power up. COMs are used to build single board computer solutions and offer OEMs fast time-to-market with reduced development cost. Like integrated circuits, they provide OEMs with significant freedom in meeting form-fit-function requirements. For all these reasons the COM methodology has gained much popularity with OEMs in the embedded industry. COM Express® is an open industry standard for Computer-On-Modules. It is designed to be future proof and to provide a smooth transition path from legacy parallel interfaces to LVDS (Low Voltage Differential Signaling) interfaces. These include the PCI bus and parallel ATA on the one hand and PCI Express and Serial ATA on the other hand.
上傳時(shí)間： 2013-11-05
上傳用戶：Wwill
為滿足無線網(wǎng)絡(luò)技術(shù)具有低功耗、節(jié)點(diǎn)體積小、網(wǎng)絡(luò)容量大、網(wǎng)絡(luò)傳輸可靠等技術(shù)要求，設(shè)計(jì)了一種以MSP430單片機(jī)和CC2420射頻收發(fā)器組成的無線傳感節(jié)點(diǎn)。通過分析其節(jié)點(diǎn)組成，提出了ZigBee技術(shù)中的幾種網(wǎng)絡(luò)拓?fù)湫问剑⒀芯苛薢igBee路由算法。針對(duì)不同的傳輸要求形式選用不同的網(wǎng)絡(luò)拓?fù)湫问娇梢员M大可能地減少系統(tǒng)成本。同時(shí)針對(duì)不同網(wǎng)絡(luò)選用正確的ZigBee路由算法有效地減少了網(wǎng)絡(luò)能量消耗，提高了系統(tǒng)的可靠性。應(yīng)用試驗(yàn)表明，采用ZigBee方式通信可以提高傳輸速率且覆蓋范圍大，與傳統(tǒng)的有線通信方式相比可以節(jié)約40%左右的成本。 Abstract: To improve the proposed technical requirements such as low-ower， small nodes， large capacity and reliable network transmission， wireless sensor nodes based on MSP430 MCU and CC2420 RF transceiver were designed. This paper provided network topology of ZigBee technology by analysing the component of the nodes and researched ZigBee routing algorithm. Aiming at different requirements of transmission mode to choose the different network topologies form can most likely reduce the system cost. And aiming at different network to choose the correct ZigBee routing algorithm can effectively reduced the network energy consumption and improved the reliability of the system. Results show that the communication which used ZigBee mode can improve the transmission rate， cover more area and reduce 40% cost compared with traditional wired communications mode.
標(biāo)簽： ZigBee 無線傳感網(wǎng)絡(luò) 協(xié)議研究 路由
上傳時(shí)間： 2013-10-09
上傳用戶：robter
The information in this specification is subject to change without notice.Use of this specification for product design requires an executed license agreement from the CompactFlashAssociation.The CompactFlash Association shall not be liable for technical or editorial errors or omissions contained herein; norfor incidental or consequential damages resulting from the furnishing, performance, or use of this material.All parts of the CompactFlash Specification are protected by copyright law and all rights are reserved. Thisdocumentation may not, in whole or in part, be copied, photocopied, reproduced, translated, or reduced to anyelectronic medium or machine readable form without prior consent, in writing, from the CompactFlash Association.The CFA logo is a trademark of the CompactFlash Association.Product names mentioned herein are for identification purposes only and may be trademarks and/or registeredtrademarks of their respective companies.© 1998-99, CompactFlash Association. All rights reserved.
標(biāo)簽： 技術(shù)資料
上傳時(shí)間： 2013-10-08
上傳用戶：stewart·
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上傳時(shí)間： 2013-11-21
上傳用戶：不懂夜的黑
The purpose of this computer program is to allow the user to construct, train and test differenttypes of artificial neural networks. By implementing the concepts of templates, inheritance andderived classes from C++ object oriented programming, the necessity for declaring multiple largestructures and duplicate attributes is reduced. Utilizing dynamic binding and memory allocationafforded by C++, the user can choose to develop four separate types of neural networks:
標(biāo)簽： differenttype construct computer purpose
上傳時(shí)間： 2013-12-06
上傳用戶：13517191407
Readers can pick up this book and become familiar with C++ in a short time. Stan has taken a very broad and complicated topic and reduced it to the essentials that budding C++ programmers need to know to write real programs. His case study is effective and provides a familiar thread throughout the book.
標(biāo)簽： familiar Readers become short
上傳時(shí)間： 2015-07-20
上傳用戶：thinode
This submission includes the presentation and model files that were used in delivering a webinar on 12-15-05 that covered the topic of modeling Hybrid Electric Vehicles. Hybrid electric vehicles (HEVs) have proven they can substantially improve fuel economy and reduce emissions. Because HEVs combine an electric drive with the internal combustion engine (ICE) in the powertrain, the vehicle?s kinetic energy can be captured during braking and transformed into electrical energy in the battery. The dual power source also means that the ICE can be reduced in size and can operate at its most efficient speeds.
標(biāo)簽： presentation submission delivering includes
上傳時(shí)間： 2015-12-24
上傳用戶：zl5712176
FIST可堆疊文件系統(tǒng)，linux文件系統(tǒng)修改相關(guān)的開源軟件，使得對(duì)linux文件系統(tǒng)功能的改進(jìn)很簡(jiǎn)單了 The FiST (File System Translator) system combines two methods to solve the above problems in a novel way: a set of stackable file system templates for each operating system, and a high-level language that can describe stackable file systems in a cross-platform portable fashion. Using FiST, stackable file systems need only be described once. FiST s code generation tool, fistgen, compiles a single file system description into loadable kernel modules for several operating systems (currently Solaris, Linux, and FreeBSD). The project demonstrates that with FiST, code size and development time are reduced significantly, while imposing a small performance overhead of only 1-2％. These benefits are achieved, as well as portability, without changing existing operating systems or file system.
標(biāo)簽： FIST 堆疊 文件系統(tǒng)
上傳時(shí)間： 2014-01-10
上傳用戶：xsnjzljj
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