An interactive water fountain. A realistic water source in your pocket with full control. Controls: UP/DOWN - go closer/further LEFT/RIGHT - rotate # - stop rotation 1/7 - rotate camera up/down 3/9 - change water pressure 4/6 - change water rendering complexity 2/8 - ascend/descend 0 - bullet time 5 - 25 FPS limiter on/off * - HUD on/off
標簽： water interactive realistic fountain
上傳時間： 2013-12-19
上傳用戶：yuchunhai1990
I ll probably write up a short article next week outlining how the ActionScript works, so people can modify it, and work with it more easily in Flex. You can download the component and source code here. There are some instructions in the FLA on how to use it. Note that this is not a compiled component, so it won t show up in the components panel. You will have to copy the component, and the source file into your project. If anyone really wants a compiled version, let me know and I can provide one. As always, I d love to hear how people use it, and would appreciate it if you would post back to the comments if you make any significant modifications so that other people can benefit from them.
標簽： ActionScript outlining probably article
上傳時間： 2017-04-20
上傳用戶：c12228
Demo Name: Main Author: Ted Rybicki Purpose: Sync up systems and workstations clock through firewalls with socks support. NOTE: You will need to set Name field in IdSocksInfo1 to your socks server for socks support to work correctly. History: Date: 27/10/2002 01:49:13 Checked with Indy version: 9.0 ---------------------------------------------------------------------------- Notes: Demonstrates a DateTime client getting current date and time from remote DateTimeServer A list of time servers is available at: http://www.eecis.udel.edu/~mills/ntp/servers.html
標簽： workstations Rybicki Purpose systems
上傳時間： 2013-12-27
上傳用戶：helmos
The PL2303 USB to Serial adapter is your smart and convenient accessory forconnecting RS-232 serial devices to your USB-equipped Windows host computer. Itprovides a bridge connection with a standard DB 9-pin male serial port connector inone end and a standard Type-A USB plug connector on the other end. You simplyattach the serial device onto the serial port of the cable and plug the USB connectorinto your PC USB port. It allows a simple and easy way of adding serial connectionsto your PC without having to go thru inserting a serial card and traditional portconfiguration.This USB to Serial adapter is ideal for connecting modems, cellular phones, PDAs,digital cameras, card readers and other serial devices to your computer. It providesserial connections up to 1Mbps of data transfer rate. And since USB does not requireany IRQ resource, more devices can be attached to the system without the previoushassles of device and resource conflicts.Finally, the PL-2303 USB to Serial adapter is a fully USB Specification compliantdevice and therefore supports advanced power management such as suspend andresume operations as well as remote wakeup. The PL-2303 USB Serial cable adapteris designed to work on all Windows operating systems.
上傳時間： 2013-11-01
上傳用戶：ghostparker
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽： UltraScale Xilinx 架構
上傳時間： 2013-11-13
上傳用戶：瓦力瓦力hong
CodeWarrior Development Tool Suites are comprehensive integrated developmentenvironments (IDE) that provide a highly visual and automated framework toaccelerate the development of the most complex embedded applications. Acrossmost stages of the development cycle, we offer tools to help configure, debug andoptimize your design built on Freescale MPUs, MCUs, DSPs and DSCs. These toolsuites provide solutions to get your design up and running fast.
標簽： CodeWarrior 開發工具套件
上傳時間： 2013-11-07
上傳用戶：youlongjian0
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽： UltraScale Xilinx 架構
上傳時間： 2013-11-21
上傳用戶：wxqman
按鍵功能表： Space:隨機變換 right:逆時針旋轉 left:順時針旋轉 up:光標向下切換 down:光標向上切換 Enter:返回初始 Esc:退出程序
上傳時間： 2015-01-10
上傳用戶：葉山豪
LineWatcher dials your ISP, keeps your connection alive and logs errors. Originally distributed as freeware, this program counts over 10.000 downloads since its first release in 2001. See home page http://www.reseau.org/linewatcher/index.html
標簽： your LineWatcher distributed connection
上傳時間： 2015-01-10
上傳用戶：songyue1991
一個用LISP語言編寫的語法分析器。使用Bottom-up Chart Parsing算法，程序非常的簡單高效，只有二百多行。另外可以自己定義文法和字典。 源代碼公開，主要供對語法分析算法和LISP編程感興趣的人學習使用，也可以使用在自然語言處理的各種實際研究當中。
標簽： Bottom-up Parsing Chart LISP
上傳時間： 2014-01-19
上傳用戶：refent
