針對船舶氣象儀保障維修而設計的船舶氣象儀測試系統，包括信息處理終端、主儀器檢測模塊、傳感器檢測模塊，各個模塊都采用基于AVR單片機的嵌入式系統，模塊之間通過CAN總線進行通信。結果表明，船舶氣象儀測試系統能夠快速檢測船舶氣象儀故障，與單純依靠人工方式排查故障相比，故障檢測時間縮短了60%以上。 Abstract: The test system of ship meteorological instrument was developed to satisfy the maintenance of ship meteorological instruments，which composed of information processing terminal， testing module of main instrument and testing module of sensors. Each of these modules included an embedded system based on microcontroller of AVR series and communicated with other module by CAN bus. The results sHow that the test system can judge the fault of ship meteorological instrument quickly and shorten the fault detection time as much as 60% compared with simple manual troubleshooting.
上傳時間： 2013-11-23
上傳用戶：stvnash
In this document, the term Ô60xÕ is used to denote a 32-bit microprocessor from the PowerPC architecture family that conforms to the bus interface of the PowerPC 601ª, PowerPC 603ª, or PowerPC 604 microprocessors. Note that this does not include the PowerPC 602ª microprocessor which has a multiplexed address/data bus. 60x processors implement the PowerPC architecture as it is speciÞed for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits,and ßoating-point data types of 32 and 64 bits (single-precision and double-precision).1.1 Overview The MPC106 provides an integrated high-bandwidth, high-performance, TTL-compatible interface between a 60x processor, a secondary (L2) cache or additional (up to four total) 60x processors, the PCI bus,and main memory. This section provides a block diagram sHowing the major functional units of the 106 and describes brießy how those units interact.Figure 1 sHows the major functional units within the 106. Note that this is a conceptual block diagram intended to sHow the basic features rather than an attempt to sHow how these features are physically implemented on the device.
上傳時間： 2013-10-08
上傳用戶：18711024007
Internal Interrupts are used to respond to asynchronous requests from a certain part of themicrocontroller that needs to be serviced. Each peripheral in the TriCore as well as theBus Control Unit, the Debug Unit, the Peripheral Control Processor (PCP) and the CPUitself can generate an Interrupt Request.So what is an external Interrupt?An external Interrupt is something alike as the internal Interrupt. The difference is that anexternal Interrupt request is caused by an external event. Normally this would be a pulseon Port0 or Port1, but it can be even a signal from the input buffer of the SSC, indicatingthat a service is requested.The User’s Manual does not explain this aspect in detail so this ApNote will explain themost common form of an external Interrupt request. This ApNote will sHow that there is aneasy way to react on a pulse on Port0 or Port1 and to create with this impulse an InterruptService Request. Later in the second part of the document, you can find hints on how todebounce impulses to enable the use of a simple switch as the input device.Note: You will find additional information on how to setup the Interrupt System in theApNote “First steps through the TriCore Interrupt System” (AP3222xx)1. It would gobeyond the scope of this document to explain this here, but you will find selfexplanatoryexamples later on.
上傳時間： 2013-10-27
上傳用戶：zhangyigenius
The Infineon TriCore provides an Interrupt System with a high safety standard. Thisdocument contains some instructions on how to initiate an Interrupt from an externaldevice. First it will sHow you how to trigger an Interrupt Service Request by an impulseon Port 0 or Port 1. Then in the second part of the document you can find hints how todebounce impulses to enable the use of a simple switch as input device.Authors: Thomas Bliem, CQ Nguyen / Infineon SMI MD Apps
上傳時間： 2013-11-05
上傳用戶：uuuuuuu
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples sHow different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is sHown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) sHows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) sHowed a low, atransition from low to high is detected now.
上傳時間： 2013-10-23
上傳用戶：copu
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples sHow different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.
上傳時間： 2014-04-02
上傳用戶：han_zh
The 87LPC76X Microcontroller combines in a small package thebenefits of a high-performance microcontroller with on-boardhardware supporting the Inter-Integrated Circuit (I2C) bus interface.The 87LPC76X can be programmed both as an I2C bus master, aslave, or both. An overview of the I2C bus and description of the bussupport hardware in the 87LPC76X microcontrollers appears inapplication note AN464, Using the 87LPC76X Microcontroller as anI2C Bus Master. That application note includes a programmingexample, demonstrating a bus-master code. Here we sHow anexample of programming the microcontroller as an I2C slave.The code listing demonstrates communications routines for the87LPC76X as a slave on the I2C bus. It compliments the program inAN464 which demonstrates the 87LPC76X as an I2C bus master.One may demonstrate two 87LPC76X devices communicating witheach other on the I2C bus, using the AN464 code in one, and theprogram presented here in the other. The examples presented hereand in AN464 allow the 87LPC76X to be either a master or a slave,but not both. Switching between master and slave roles in amultimaster environment is described in application note AN435.The software for a slave on the bus is relatively simple, as theprocessor plays a relatively passive role. It does not initiate bustransfers on its own, but responds to a master initiating thecommunications. This is true whether the slave receives or transmitsdata—transmission takes place only as a response to a busmaster’s request. The slave does not have to worry about arbitrationor about devices which do not acknowledge their address. As theslave is not supposed to take control of the bus, we do not demandit to resolve bus exceptions or “hangups”. If the bus becomesinactive the processor simply withdraws, not interfering with themaster (or masters) on the bus which should (hopefully) try toresolve the situation.
上傳時間： 2013-11-19
上傳用戶：shirleyYim
基于變頻調速的水平連鑄機拉坯輥速度控制系統Frequency Inverter Based Drawing RollerS peedC ontrolSy stem ofHorizontal Continuous Casting MachineA 偉劉沖旅巴(南 華 大 學電氣工程學院，衡陽421001)摘要拉坯輥速度控制是水平連鑄工藝的關鍵技術之一，采用變頻器實現水平連鑄機拉坯輥速度程序控制，由信號發生裝置給變頻器提供程控信號。現場應用表明該控制系統速度響應快，控制精度高，滿足了水平連鑄生產的需要。關鍵詞水平連鑄拉坯輥速度程序控制變頻器Absh'act Speedc ontorlof dr awingor leris on eo fth ek eyte chnologiesfo rho rizontalco ntinuousca stingm achine.Fo rth ispu rpose,fr equencyco nverterisad optedfo rdr awingor lersp eedp rogrammablec ontorlof ho rizontalco ntinuousca stingm achine,th ep rogrammableco ntorlsi gnalto fr equencyc onverteris provided場a signal generator. The results of application sHow that the response of system is rapid and the control accuracy is high enough to meet thedemand of production of horizontal continuous casting.Keywords Horizontalco ntinuousc asting Drawingor ler Speedp rogrammablec ontrol Ferquencyin verter 隨著 現 代 化工業生產對鋼材需求量的日益增加，連鑄生產能力已經成為衡量一個國家冶金工業發展水平的重要指標之一。近十幾年來，水平連鑄由于具有投資少、鑄坯直、見效快等多方面的優點，國內許多鋼鐵企業利用水平連鑄機來澆鑄特種合金鋼，發揮了其獨特的優勢并取得了較好的經濟效益〔1,2)0采用 水 平 連鑄機澆鑄特種合金鋼時，由于拉坯機是水平連鑄系統中的關鍵設備之一，拉坯機及其控制性能的好壞直接影響著連鑄坯的質量，因此，連鑄的拉坯技術便成為整個水平連鑄技術的核心。由于鋼的冶煉過程是在高溫下進行的，鋼水溫度的變化又容易影響鑄坯的質量和成材率，因此，如何能在高溫環境下控制好與鑄坯速度相關的參數(拉、推程量，中停時間和拉坯頻率等)對于確保連鑄作業的進一步高效化，延長系統的連續作業時間十分關鍵。因此，拉坯輥速度控制技術是連鑄生產過程控制領域中的關鍵技術之- [31
上傳時間： 2013-10-12
上傳用戶：gxy670166755
為了擴大監控范圍，提高資源利用率，降低系統成本，提出了一種多通道視頻切換的解決方案。首先從視頻信號分離出行場信號，然后根據行場信號由DSP和FPGA產生控制信號，控制多路視頻通道之間的切換，從而實現讓一個視頻處理器同時監控不同場景。實驗結果表明，該方案可以在視頻監控告警系統中穩定、可靠地實現視頻通道的切換。 Abstract: To expand the scope of monitoring， improve resource utilization， reduce system cost， a multiple video channels signal switching method is pointed out in this paper. First， horizontal sync signal and field sync signal from the video signal are separated， then control signal according to the sync signal by DSP and FPGA is generated to control the switching between multiple video channels. Thus， it achieves to make a video processor to monitor different place. Experimental results sHow that the method can realize video channel switching reliably， and is applied in the video monitoring warning system successfully.
上傳時間： 2013-11-09
上傳用戶：不懂夜的黑
為提升虛擬儀器傳輸速率與實時性能，擴展監測范圍，在VC的軟件平臺上設計了一種全功能虛擬示波器。與傳統虛擬示波器相比，該系統采用嵌入式系統完成信號采集，采用工業以太網為傳輸介質，通過線性插值算法和多線程編程思想，實現波形顯示、參數計算、頻譜分析以及波形存儲及回放功能。實驗結果表明，該虛擬示波器可以實現20 kHz采樣頻率下的波形精確顯示，達到預期的各項指標。 Abstract: o enhance the transfer rate and real-time of virtual instrument performance， expand scope of monitoring， this paper uses the VCs software platform to design a fully functional virtual oscilloscope. Compared with traditional virtual oscilloscope， this system adopts the embedded system to complete the data acquisition， industrial Ethernet as the transmission medium used by the linear interpolation algorithm and multi-threaded programming ideas， namely to achieve waveform display， parameter calculation， spectrum analysis and waveform storage and playback. Experimental results sHow that the virtual oscilloscope can accurately display the waveform with 20kHz sampling frequency， and achieve the desired targets.
上傳時間： 2013-11-25
上傳用戶：wbwyl
