The large-scale deployment of the smart grid (SG) paradigm could play a strategic role in supporting the evolution of conventional electrical grids toward active, flexible and self- healing web energy networks composed of distributed and cooperative energy resources. From a conceptual point of view, the SG is the convergence of information and operational technologies applied to the electric grid, providing sustainable options to customers and improved security. Advances in research on SGs could increase the efficiency of modern electrical power systems by: (i) supporting the massive penetration of small-scale distributed and dispersed generators; (ii) facilitating the integration of pervasive synchronized metering systems; (iii) improving the interaction and cooperation between the network components; and (iv) allowing the wider deployment of self-healing and proactive control/protection paradigms.
標(biāo)簽： Computational Intelligence
上傳時(shí)間： 2020-06-07
上傳用戶(hù)：shancjb
The term “ smart grid ” defi nes a self - healing network equipped with dynamic optimiza- tion techniques that use real - time measurements to minimize network losses, maintain voltage levels, increase reliability, and improve asset management. The operational data collected by the smart grid and its sub - systems will allow system operators to rapidly identify the best strategy to secure against attacks, vulnerability, and so on, caused by various contingencies. However, the smart grid fi rst depends upon identifying and researching key performance measures, designing and testing appropriate tools, and developing the proper education curriculum to equip current and future personnel with the knowledge and skills for deployment of this highly advanced system.
上傳時(shí)間： 2020-06-07
上傳用戶(hù)：shancjb
This book is an outgrowth of a course developed at Stanford University over the past five years. It is suitable as a self-contained textbook for second-level undergraduates or for first-level graduate students in almost every field that employs quantitative methods. As prerequisites, it is assumed that the student may have had a first course in differential equations and a first course in linear algebra or matrix analysis. These two subjects, however, are reviewed in Chapters 2 and 3, insofar as they are required for later developments.
標(biāo)簽： Introduction_to_Dynamic_Systems
上傳時(shí)間： 2020-06-10
上傳用戶(hù)：shancjb
The large-scale deployment of the smart grid (SG) paradigm could play a strategic role in supporting the evolution of conventional electrical grids toward active, flexible and self- healing web energy networks composed of distributed and cooperative energy resources. From a conceptual point of view, the SG is the convergence of information and operational technologies applied to the electric grid, providing sustainable options to customers and improved security. Advances in research on SGs could increase the efficiency of modern electrical power systems by: (i) supporting the massive penetration of small-scale distributed and dispersed generators; (ii) facilitating the integration of pervasive synchronized metering systems; (iii) improving the interaction and cooperation between the network components; and (iv) allowing the wider deployment of self-healing and proactive control/protection paradigms.
標(biāo)簽： Computational Intelligence
上傳時(shí)間： 2020-06-10
上傳用戶(hù)：shancjb
HRVAS is a complete and self-contained heart rate variability analysis software (HRVAS) package. HRVAS offers several preprocessing options. HRVAS offers time-domeain, freq-domain, time-frequency, and nonlinear HRV analysis. All results can be exported to an Excel file. For processing many files HRVAS offers a bach processing feature. All settings/options can be saved to a .mat file and reloaded for future HRV analysis. Upon starting HRVAS all previously used settings/options are loaded.
標(biāo)簽： HRVAS時(shí)頻分析
上傳時(shí)間： 2021-09-19
上傳用戶(hù)：boboo
可測(cè)試性設(shè)計(jì)（Design-For-Testability，DFT）已經(jīng)成為芯片設(shè)計(jì)中不可或缺的重要組成部分。它通過(guò)在芯片的邏輯設(shè)計(jì)中加入測(cè)試邏輯提高芯片的可測(cè)試性。在高性能通用 CPU 的設(shè)計(jì)中，可測(cè)試性設(shè)計(jì)技術(shù)得到了廣泛的應(yīng)用。本文結(jié)合幾款流行的 CPU，綜述了可應(yīng)用于通用 CPU 等高性能芯片設(shè)計(jì)中的各種可測(cè)試性方法，包括掃描設(shè)計(jì)（Scan Design），內(nèi)建自測(cè)試（Built-In Self-Test，BIST），測(cè)試點(diǎn)插入（Test Point Insertion），與 IEEE 1149.1標(biāo)準(zhǔn)兼容的邊界掃描設(shè)計(jì)（Boundary Scan Design，BSD）等技術(shù)。
標(biāo)簽： 可測(cè)試性設(shè)計(jì) CPU
上傳時(shí)間： 2021-10-15
上傳用戶(hù)：
The PW2202 is silicon N-channel Enhanced VDMOSFETs, is obtained by the self-aligned planarTechnology which reduce the conduction loss, improve switching performance and enhance theavalanche energy. The transistor can be used in various power switching circuit for system
標(biāo)簽： pw2202
上傳時(shí)間： 2022-02-11
上傳用戶(hù)：默默
高清電子書(shū)-C++ Primer Plus, 第6版英文版 1438頁(yè)Learning C++ is an adventure of discovery, particularly because the language accommodates several programming paradigms, including object-oriented programming, generic programming, and the traditional procedural programming.The fifth edition of this book described the language as set forth in the ISO C++ standards, informally known as C++99 and C++03, or, sometimes as C++99/03. (The 2003 version was largely a technical correction to the 1999 standard and didn’t add any new features.) Since then, C++ continues to evolve.As this book is written, the international C++ Standards Committee has just approved a new version of the standard.This standard had the informal name of C++0x while in development, and now it will be known as C++11. Most contemporary compilers support C++99/03 quite well, and most of the examples in this book comply with that standard. But many features of the new standard already have appeared in some implementations, and this edition of C++ Primer Plus explores these new features. C++ Primer Plus discusses the basic C language and presents C++ features, making this book self-contained. It presents C++ fundamentals and illustrates them with short, to-the-point programs that are easy to copy and experiment with.You learn about input/output (I/O), how to make programs perform repetitive tasks and make choices, the many ways to handle data, and how to use functions.You learn about the many features C++ has added to C, including the followi
標(biāo)簽： C++
上傳時(shí)間： 2022-02-19
上傳用戶(hù)：trh505
電子書(shū)-RTL Design Style Guide for Verilog HDL540頁(yè)A FF having a fixed input value is generated from the description in the upper portion of Example 2-21. In this case, ’0’ is output when the reset signal is asynchronously input, and ’1’ is output when the START signal rises. Therefore, the FF data input is fixed at the power supply, since the typical value ’1’ is output following the rise of the START signal. When FF input values are fixed, the fixed inputs become untestable and the fault detection rate drops. When implementing a scan design and converting to a scan FF, the scan may not be executed properl not be executed properly, so such descriptions , so such descriptions are not are not recommended. recommended.[1] As in the lower part of Example 2-21, be sure to construct a synchronous type of circuit and ensure that the clock signal is input to the clock pin of the FF. Other than the sample shown in Example 2-21, there are situations where for certain control signals, those that had been switched due to the conditions of an external input will no longer need to be switched, leaving only a FF. If logic exists in a lower level and a fixed value is input from an upper level, the input value of the FF may also end up being fixed as the result of optimization with logic synthesis tools. In a situation like this, while perhaps difficult to completely eliminate, the problem should be avoided as much as possible.
標(biāo)簽： RTL verilog hdl
上傳時(shí)間： 2022-03-21
上傳用戶(hù)：canderile
本系統(tǒng)采用電動(dòng)機(jī)電樞供電回路串接采樣電阻的方式來(lái)實(shí)現(xiàn)對(duì)小型直流有刷電動(dòng)機(jī)的轉(zhuǎn)速測(cè)量。該系統(tǒng)主要由二階低通濾波電路,小信號(hào)放大電路、單片機(jī)測(cè)量顯示電路、開(kāi)關(guān)穩(wěn)壓電源電路等組成。同時(shí)自制電機(jī)測(cè)速裝置,用高頻磁環(huán)作為載體,用線(xiàn)圈繞制磁環(huán),利用電磁感應(yīng)原理檢測(cè)電機(jī)運(yùn)行時(shí)的漏磁,將變化的磁場(chǎng)信號(hào)轉(zhuǎn)化為磁環(huán)上的感應(yīng)電流。用信號(hào)處理單元電路將微弱電信號(hào)轉(zhuǎn)化為脈沖信號(hào),送由單片機(jī)檢測(cè),從而達(dá)到準(zhǔn)確測(cè)量電機(jī)的速度的要求。In this system, the sampling resistance of armature power supply circuit is connected in series to measure the speed of small DC brush motor. The system is mainly composed of second-order low-pass filter circuit, small signal amplifier circuit, single-chip measurement and display circuit, switching regulated power supply circuit and so on. At the same time, the self-made motor speed measuring device uses high frequency magnetic ring as the carrier, coil winding magnetic ring, and electromagnetic induction principle to detect the leakage of magnetic field during the operation of the motor, which converts the changed magnetic field signal into the induced current on the magnetic ring. The weak electric signal is transformed into pulse signal by signal processing unit circuit, which is sent to single chip computer for detection, so as to meet the requirement of accurate measurement of motor speed.
標(biāo)簽： 直流電動(dòng)機(jī)
上傳時(shí)間： 2022-03-26
上傳用戶(hù)：
蟲(chóng)蟲(chóng)下載站版權(quán)所有 京ICP備2021023401號(hào)-1
