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We address the problem of blind carrier frequency-offset (CFO) estimation in quadrature amplitude modulation,
phase-shift keying, and pulse amplitude modulation
communications systems.We study the performance of a standard
CFO estimate, which consists of first raising the received signal to
the Mth power, where M is an integer depending on the type and
size of the symbol constellation, and then applying the nonlinear
least squares (NLLS) estimation approach. At low signal-to noise
ratio (SNR), the NLLS method fails to provide an accurate CFO
estimate because of the presence of outliers. In this letter, we derive
an approximate closed-form expression for the outlier probability.
This enables us to predict the mean-square error (MSE) on CFO
estimation for all SNR values. For a given SNR, the new results
also give insight into the minimum number of samples required in
the CFO estimation procedure, in order to ensure that the MSE
on estimation is not significantly affected by the outliers.
標簽:
frequency-offset
estimation
quadrature
amplitude
上傳時間:
2014-01-22
上傳用戶:牛布牛
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The investigation of the propagation channel is becoming more and more important in mod-
ern wireless communication. The demand for spectral efficiency motivates exploitation of
all channels that can possibly be used for communications. Nowadays, a common trend for
designing physical layer algorithms is to adapt the transceiving strategy, either by maximizing
the diversity gains or by utilizing the coherence of the channels to improve the signal-to-noise
power ratio.
標簽:
Characterization
Propagation
Channel
上傳時間:
2020-05-31
上傳用戶:shancjb
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為了提高超高頻RFID系統中閱讀器在低信噪比的情況下仍具有較高的識別能力,提出一種基于FPGA系統結合軟件無線電方法實現超高頻RFID射頻前端電路方案。超高頻射頻識別系統必須符合EPC Class 1generation 2標準,所設計的電路系統以Xilinx公司的XC6SLX16-2CSG324FPGA芯片為硬件基礎,將數字基帶調制解調和中頻濾波電路在FPGA系統中設計實現,重點闡述了射頻前端電路的設計結構、AD/DA轉換電路,以及數字濾波器的設計。實驗結果表明,所設計的超高頻RFID閱讀器簡化了前端電路系統結構,提升了穩定性,增強了抗干擾能力。該電路系統在信噪比較低的情況下,能夠較好地實現915MHz頻率的射頻接收和發送。In order to improve the reader UHF RFID system still has a higher ability to identify,in the case of low signal-to-noise ratio.The UHF RFID systems must comply with EPC Class 1 generation 2 standard.In this paper,the design of the circuit system based on Xilinx's XC6SLX16-2CSG324 FPGA chip,and presents UHF RFID RF front-end circuit with software radio based on FPGA system.Digital baseband modem and IF filter circuit is designed and implemented in the FPGA system,and focused on designing the structure of the RF front-end circuit,AD/DA conversion circuits,and digital filter.Experimental results show that the UHF RFID reader de...
標簽:
915mhz
超高頻
rfid
閱讀
射頻
前端
電路
設計
上傳時間:
2022-04-17
上傳用戶:shjgzh
-
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
標簽:
Signal
Input
Fall
Rise
上傳時間:
2013-10-23
上傳用戶:copu
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隨著光伏發電系統快速發展,以及電動汽車充電樁的普及,傳統的剩余電流保護器無法滿足實際需求。介紹了一款B型剩余電流保護器,采用磁調制剩余電流互感器和零序電流互感器采集剩余電流。根據GB/T 22794—2017標準要求,可識別1 kHz及以下的正弦交流、帶和不帶直流分量的脈動直流、平滑直流等剩余電流信號。經信號調理電路將電壓信號送到單片機進行采集和判斷。通過試驗測試,該樣機在測試精度和速度上均符合國家標準的相關要求。The rapid development of photovoltaic power generation systems and the popularity of electric vehicle charging piles make the traditional residual current protective devices unable to meet the actual demand.This paper proposed a type B residual current protective device,which uses the magnetically modulated residual current transformer and the zero sequence current transformer to acquire the residual current.According to the requirements of GB/T 22794—2017,the type B residual current protective device can detect sinusoidal AC residual current of 1kHz and below 1kHz,pulsating DC residual current with and without DC component,smooth DC residual current and so on.The signal processing circuit sends the voltage signal to the MCU for acquisition and judgment.Through experimental tests,the device meets the relevant requirements of national standards in terms of test accuracy and speed.
標簽:
電流保護器
上傳時間:
2022-03-27
上傳用戶:
-
This demonstration illustrates the application of adaptive filters to signal separation
using a structure called an adaptive line enhancer (ALE). In adaptive line
enhancement, a measured signal x(n) contains two signals, an unknown signal
of interest v(n), and a nearly-periodic noise signal eta(n). The goal is to remove
the noise signal from the measured signal to obtain the signal of interest.
標簽:
demonstration
application
illustrates
separation
上傳時間:
2014-09-08
上傳用戶:2525775
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· 摘要: MATLAB是一種建立在向量、數組、矩陣基礎上,面向科學和工程計算的高級語言,為科學研究和工程計算提供了一個方便有效的工具.該文簡要介紹了B樣條和B樣條小波的構成,并利用MATLAB語言編寫了繪制任意階B樣條和B樣條小波圖形的程序.
標簽:
MATLAB
程序
上傳時間:
2013-04-24
上傳用戶:sqq
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WHAT MIME64 IS: MIME64 is an encoding described in RFC1341 as MIME base64.Its purpose is to encode binary files into ASCII so that they may be passedthrough e-mail gates. In this regard, MIME64 is similar to UUENCODE.Although most binaries these days are transmitted using UUENCODE, Ihave seen a few using MIME64, and I have had requests from friends thatI decode MIME64 files that have fallen into their hands. As long assome MIME64 continues to exist, a package such as this one is usefulto have.
標簽:
MIME
described
64
encoding
上傳時間:
2013-12-17
上傳用戶:maizezhen
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剖析Intel IA32 架構下C 語言及CPU 浮點數機制
Version 0.01
哈爾濱工業大學 謝煜波
(email: xieyubo@126.com 網址:http://purec.binghua.com)
(QQ:13916830 哈工大紫丁香BBSID:iamxiaohan)
前言
這兩天翻看一本C 語言書的時候,發現上面有一段這樣寫到
例:將同一實型數分別賦值給單精度實型和雙精度實型,然后打印輸出。
#include <stdio.h>
main()
{
float a
double b
a = 123456.789e4
b = 123456.789e4
printf(“%f\n%f\n”,a,b)
}
運行結果如下:
標簽:
Version
xieyubo
Intel
email
上傳時間:
2013-12-25
上傳用戶:徐孺
-
A part public bus simulation system, mainly about map design, java file, groupwork, helpful to the beginners
標簽:
simulation
groupwork
helpful
mainly
上傳時間:
2014-01-06
上傳用戶:變形金剛