關于FPGA流水線設計的論文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL design of a parameterized integer array multiplier is presented and also an IEEE 754 compliant 32-bit floating-point multiplier. We show how to write VHDL cells that implement such approach, and how the array multiplier architecture was adapted. Synthesis and simulation were performed for Altera Apex20KE devices, although the VHDL code should be portable to other devices. For this family, a 16 bit integer multiplier achieves a frequency of 266MHz, while the floating point unit reaches 235MHz, performing 235 MFLOPS in an FPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and other considerations to apply the technique in real designs are also addressed.
標簽： investigates implementing pipelines circuits
上傳時間： 2015-07-26
上傳用戶：CHINA526
機器人障礙物避免和路徑規劃，適用于player/stage防真環境。
上傳時間： 2015-10-21
上傳用戶：koulian
An unsatisfactory property of particle filters is that they may become inefficient when the observation noise is low. In this paper we consider a simple-to-implement particle filter, called ‘LIS-based particle filter’, whose aim is to overcome the above mentioned weakness. LIS-based particle filters sample the particles in a two-stage process that uses information of the most recent observation, too. Experiments with the standard bearings-only tracking problem indicate that the proposed new particle filter method is indeed a viable alternative to other methods.
標簽： unsatisfactory inefficient property particle
上傳時間： 2014-01-11
上傳用戶：大三三
The package includes 3 Matlab-interfaces to the c-code: 1. inference.m An interface to the full inference package, includes several methods for approximate inference: Loopy Belief Propagation, Generalized Belief Propagation, Mean-Field approximation, and 4 monte-carlo sampling methods (Metropolis, Gibbs, Wolff, Swendsen-Wang). Use "help inference" from Matlab to see all options for usage. 2. gbp_preprocess.m and gbp.m These 2 interfaces split Generalized Belief Propagation into the pre-process stage (gbp_preprocess.m) and the inference stage (gbp.m), so the user may use only one of them, or changing some parameters in between. Use "help gbp_preprocess" and "help gbp" from Matlab. 3. simulatedAnnealing.m An interface to the simulated-annealing c-code. This code uses Metropolis sampling method, the same one used for inference. Use "help simulatedAnnealing" from Matlab.
標簽： Matlab-interfaces inference interface the
上傳時間： 2016-08-27
上傳用戶：gxrui1991
基于AT91RM9200的BootLoader設計與實現 ，依賴于CPU體系結構的代碼，比如設備初始化、開關中斷、初始化時鐘等，通常都放在stage 1中，而且都用匯編來實現，以達到短小精悍的目的。而stage 2通常用C語言來實現，這樣可以實現較復雜的功能，而且代碼有較好的可讀性和可移植性。
標簽： BootLoader 9200 AT 91
上傳時間： 2014-01-11
上傳用戶：zhangliming420
Program helping you to remember the route. It cab be route from conference room to coffee-room, it can be tourist trip, it can be pathway in labyrinth. during first traversal you make notes in you phone, specifying direction of movement and target of each step. Phone remembers how much time each steps takes. Then you can just inspect information about this trip and check duration of each stage and the whole trip. You can also replay it in forward and backward direction. So if somebody show you the shortest way to coffee machine, you can easily find the way back and can repeat this trip in future.
標簽： route coffee-room conference remember
上傳時間： 2014-01-05
上傳用戶：1159797854
In this paper we present a classifier called bi-density twin support vector machines (BDTWSVMs) for data classification. In the training stage, BDTWSVMs first compute the relative density degrees for all training points using the intra-class graph whose weights are determined by a local scaling heuristic strategy, then optimize a pair of nonparallel hyperplanes through two smaller sized support vector machine (SVM)-typed problems. In the prediction stage, BDTWSVMs assign to the class label depending on the kernel density degree-based distances from each test point to the two hyperplanes. BDTWSVMs not only inherit good properties from twin support vector machines (TWSVMs) but also give good description for data points. The experimental results on toy as well as publicly available datasets indicate that BDTWSVMs compare favorably with classical SVMs and TWSVMs in terms of generalization
標簽： recognition Bi-density machines support pattern vector twin for
上傳時間： 2019-06-09
上傳用戶：lyaiqing
Digital cellular telecommunications system (Phase 2+); Security mechanisms for SIM application toolkit; stage 2 (3GPP TS 03.48 version 8.8.0 Release 1999)
標簽： GSM
上傳時間： 2019-06-14
上傳用戶：twogozi
The continuous progress in modern power device technology is increasingly supported by power-specific modeling methodologies and dedicated simulation tools. These enable the detailed analysis of operational principles on the the device and on the system level; in particular, they allow the designer to perform trade- off studies by investigating the operation of competing design variants in a very early stage of the development process. Furthermore, using predictive computer simulation makes it possible to analyze the device and system behavior not only under regularoperatingconditions, but also at the rim of the safe-operatingarea and beyond of it, where destructive processes occur that limit the lifetime of a power system.
標簽： POWERHVMOS_Devices_Compact_Modeli ng
上傳時間： 2020-06-07
上傳用戶：shancjb
ABSTRACTThe flyback power stage is a popular choice for single and multiple output dc-to-dc converters at powerlevels of 150 Watts or less. Without the output inductor required in buck derived topologies, such as theforward or push-pull converter, the component count and cost are reduced. This application note will reviewthe design procedure for the power stage and control electronics of a flyback converter. In these isolatedconverters, the error signal from the secondary still needs to cross the isolation boundary to achieveregulation. By using the UC3965 Precision Reference with Low Offset Error Amplifier on the secondaryside to drive an optocoupler and the UCC3809 Economy Primary Side Controller on the primary side, asimple and low cost 50 Watt isolated power supply is realized.
標簽： 隔離
上傳時間： 2021-11-24
上傳用戶：kingwide
