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  • 計(jì)算FR4上的差分阻抗(PDF)

    Calculation of the Differential Impedance of Tracks on FR4 substrates There is a discrepancy between calculated and measured values of impedance for differential transmission lineson FR4. This is especially noticeable in the case of surface microstrip configurations. The anomaly is shown tobe due to the nature of the substrate material. This needs to be considered as a layered structure of epoxy resinand glass fibre. Calculations, using Boundary Element field methods, show that the distribution of the electricfield within this layered structure determines the apparent dielectric constant and therefore affects theimpedance. Thus FR4 cannot be considered to be uniform dielectric when calculating differential impedance.

    標(biāo)簽: FR4 計(jì)算 差分阻抗

    上傳時(shí)間: 2014-12-24

    上傳用戶:DE2542

  • pci e PCB設(shè)計(jì)規(guī)范

    This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.  

    標(biāo)簽: pci PCB 設(shè)計(jì)規(guī)范

    上傳時(shí)間: 2013-10-15

    上傳用戶:busterman

  • 基于HITAG讀寫芯片HTRC110的讀寫設(shè)備設(shè)計(jì)

    Designing read/write device (RWD) units for industrial RF-Identification applications is strongly facilitated by the NXP Semiconductors HITAG Reader Chip HTRC110. All needed function blocks, like the antenna driver, modulator demodulator and antenna diagnosis unit, are integrated in the HTRC110. therefore only a minimum number of additional passive components are required for a complete RWD. This Application Note describes how to design an industrial RF-Identification system with the HTRC110. The major focus is dimensioning of the antenna, all other external components including clock and power supply, as well as the demodulation principle and its implementatio

    標(biāo)簽: HITAG HTRC 110 讀寫芯片

    上傳時(shí)間: 2013-10-22

    上傳用戶:zhengjian

  • 基于C8051F040的以太網(wǎng)-CAN轉(zhuǎn)換電路設(shè)計(jì)

    以太網(wǎng)和CAN總線應(yīng)用廣泛,但由于其通信協(xié)議不同,兩種總線器件間無(wú)法進(jìn)行數(shù)據(jù)通信,因此,設(shè)計(jì)了基于CP2200與C8051F040的以太網(wǎng)總線與CAN總線接口轉(zhuǎn)換電路,并給出部分相關(guān)硬件電路與軟件設(shè)計(jì)分析。在保證數(shù)據(jù)完整和協(xié)議可靠的前提下,通過(guò)握手協(xié)議和簡(jiǎn)化的以太網(wǎng)協(xié)議,不僅實(shí)現(xiàn)了以太網(wǎng)數(shù)據(jù)與CAN數(shù)據(jù)的轉(zhuǎn)發(fā),同時(shí)還順利的解決了以太網(wǎng)的高速性與CAN的低速率沖突,以及兩者數(shù)據(jù)包之間的大小不同的矛盾。 Abstract:  In the development of actual application, Ethernet and CAN bus are used very extensively. Owing to its various communication protocols, the communicating between two kinds of bus device can’t be carried out. therefore, in order to solve this problem, the Ethernet-CAN bus interface circuit based on CP2200 and C8051F040 was designed in this paper, and part of the related hardware circuit and software design analysis were given. On the condition of data’s integrity and protocols’reliability, through the handshaking protocols and the simplified the Ethernet protocol, not only the data switching between CAN and Ethernet was realized, but also the differ in velocity and packet size was solved.

    標(biāo)簽: C8051F040 CAN 以太網(wǎng) 轉(zhuǎn)換

    上傳時(shí)間: 2013-10-15

    上傳用戶:Ants

  • 基于ATmega16的標(biāo)記機(jī)控制系統(tǒng)

    介紹了當(dāng)前普通標(biāo)記機(jī)控制系統(tǒng)現(xiàn)狀及其存在缺點(diǎn),給出氣動(dòng)標(biāo)記機(jī)及相頻修正PWM模式的工作原理。采用ATmega16單片機(jī)和USB轉(zhuǎn)換RS232接口器件CH341T實(shí)現(xiàn)驅(qū)動(dòng)控制系統(tǒng)與PC的實(shí)時(shí)通訊,標(biāo)記控制系統(tǒng)可升級(jí)到USB接口。采用基于ATmega16的相頻修正PWM替換555振蕩電路產(chǎn)生的PWM,可直接通過(guò)軟件調(diào)整PWM信號(hào)。使用達(dá)林頓三極管TIP122替代直流繼電器驅(qū)動(dòng)高頻電磁閥,使得電磁閥驅(qū)動(dòng)電路簡(jiǎn)單,成本低廉。該控制系統(tǒng)已成功應(yīng)用于氣動(dòng)標(biāo)記機(jī)。 Abstract:  In this paper,the actuality and demerit of the common gas marking machine control systems are described.The operation principle of the gas marking machine and the phase and frequency correct PWM of ATmega16is introduced.The real-time communication between the driving control system and PC by CH341T which its function is translated USB to RS232is realized,the control systems is updated grade to USB interface.The PWM signal can be adjustable by software for the555surge circuit was substituted by the phase and frequency.The high frequency electromagnetic value’s driving circuit by DC relay is replaced by TIP122,therefore,the circuit is become simple and the cost cheap.The control systems has been widely used in gas marking machine.

    標(biāo)簽: ATmega 16 標(biāo)記 控制系統(tǒng)

    上傳時(shí)間: 2013-10-18

    上傳用戶:1427796291

  • LS7266R1在電子式萬(wàn)能材料試驗(yàn)機(jī)中的應(yīng)用

    針對(duì)材料試驗(yàn)機(jī)等設(shè)備中要求測(cè)量或控制材料拉伸或壓縮的位移,一般采用光電軸角編碼器檢測(cè)位置信號(hào),輸出正交編碼脈沖信號(hào)。若采用其他方法檢測(cè)位置信號(hào),必然導(dǎo)致電路設(shè)計(jì)復(fù)雜,可靠性降低。因此,提出一種基于LS7266R1的電子式萬(wàn)能材料試驗(yàn)機(jī)設(shè)計(jì)方案。給出了試驗(yàn)機(jī)中的控制器工作原理,LS7266R1與單片機(jī)的接口硬件設(shè)計(jì),以及主程序軟件流程圖。巧妙地把力量傳感器,位移傳感器等機(jī)械運(yùn)動(dòng)狀態(tài)的壓力或拉力以及位置坐標(biāo),變成了電壓信號(hào)和電脈沖數(shù)字信號(hào),供A/D測(cè)量和LS7266R1計(jì)數(shù),從而實(shí)現(xiàn)了獨(dú)立完成材料試驗(yàn)控制或通過(guò)PC機(jī)串口命令完成材料試驗(yàn)控制。 Abstract:  Aiming at the requirement that the displacement of the tension and compression always be tested and controlled in the equipement such as material testing machine. The position signal was tested by photoelectric axial angle coder. therefore, the paper proposes the design of electronic universal testing machine design based on LS7266R1. If the position signal detected by other methods, will inevitably lead to the circuit design complexity, reliability decreased. The work theory of the controller, the hardware interface design between LS7266R1 and single chip, and the flow chart of main program, are presented in this paper. The signal of the compression or tension power and displacement at working, which tested by power sensor and displacement sensor especially, is changed into electric voltage and electric pulse numerical signals. And these signals can be tested by A/D and counted by LS7266R1. Finally the test of the material properties can be controlled by itself, or controlled by the COM command of PC.

    標(biāo)簽: 7266R 7266 LS R1

    上傳時(shí)間: 2013-11-02

    上傳用戶:yl1140vista

  • 開(kāi)放式匯編器系統(tǒng)的設(shè)計(jì)

    匯編器在微處理器的驗(yàn)證和應(yīng)用中舉足輕重,如何設(shè)計(jì)通用的匯編器一直是研究的熱點(diǎn)之一。本文提出了一種開(kāi)放式的匯編器系統(tǒng)設(shè)計(jì)思想,在匯編語(yǔ)言與機(jī)器語(yǔ)言間插入中間代碼CMDL(code mapping description language)語(yǔ)言,打破匯編語(yǔ)言與機(jī)器語(yǔ)言的直接映射關(guān)系,由此建立起一套描述匯編語(yǔ)言與機(jī)器語(yǔ)言的開(kāi)放式映射體系。基于此開(kāi)放式映射體系開(kāi)發(fā)了一套匯編器系統(tǒng),具有較高層次上的通用性和可移植性。【關(guān)鍵詞】指令集,CMDL,匯編器,開(kāi)放式 Design of Retargetable Assembler System Liu Ling Feng Wen Nan Wang Ying Chun Jiang An Ping Ji Li Jiu IME of Peking University, 100871【摘要】An assembler plays a very important role in the field of microprocessor verifications and applications, thus how to build a retargetable assembler system has been a hotspot in this field for long time. This paper presents a new method about the retargetable assembler system design.It provides a kind of language CMDL, code mapping description language. During the process of assembling, assembler languages are firstly translated to CMDL, and then mapped to the machine codes. In an other word, CMDL is inserted between assembler languages and machine codes during the translation procedure. As a medium code, CMDL has a lot of features, such as high extraction, strong descript capabilities. It can describe almost all attributes of assembler languages. By breaking the direct mapping relationship between assembler languages and machine codes, the complexities of machine codes are hided to the users, therefore, the new retargetable assembler system has higher retargetable level by converting the mapping from assembler languages and machine codes to assembler languages and CMDL, and implementationof it becomes easier. Based on the new mapping system structure, a retargetable assemblersystem is developed. It proved the whole system has good retargetability and implantability.【關(guān)鍵詞】instruction set, symbol table, assembler, lexical analysis, retargetability

    標(biāo)簽: 開(kāi)放式 匯編器

    上傳時(shí)間: 2013-10-10

    上傳用戶:meiguiweishi

  • PCA9544A 4channel I2C multiple

    The PCA9544A provides 4 interrupt inputs, one for each channeland one open drain interrupt output. When an interrupt is generated byany device, it will be detected by the PCA9544A and the interruptoutput will be driven LOW. The channel need not be active fordetection of the interrupt. A bit is also set in the control byte.Bits 4 – 7 of the control byte correspond to channels 0 – 3 of thePCA9544A, respectively. therefore, if an interrupt is generated byany device connected to channel 2, the state of the interrupt inputs isloaded into the control register when a read is accomplished.Likewise, an interrupt on any device connected to channel 0 wouldcause bit 4 of the control register to be set on the read. The mastercan then address the PCA9544A and read the contents of thecontrol byte to determine which channel contains the devicegenerating the interrupt. The master can then reconfigure thePCA9544A to select this channel, and locate the device generatingthe interrupt and clear it. The interrupt clears when the deviceoriginating the interrupt clears.

    標(biāo)簽: 4channel multiple 9544A 9544

    上傳時(shí)間: 2014-12-28

    上傳用戶:潛水的三貢

  • Emulating a synchronous serial

    The C500 microcontroller family usually provides only one on-chip synchronous serialchannel (SSC). If a second SSC is required, an emulation of the missing interface mayhelp to avoid an external hardware solution with additional electronic components.The solution presented in this paper and in the attached source files emulates the mostimportant SSC functions by using optimized SW routines with a performance up to 25KBaud in Slave Mode with half duplex transmission and an overhead less than 60% atSAB C513 with 12 MHz. Due to the implementation in C this performance is not the limitof the chip. A pure implementation in assembler will result in a strong reduction of theCPU load and therefore increase the maximum speed of the interface. In addition,microcontrollers like the SAB C505 will speed up the interface by a factor of two becauseof an optimized architecture compared with the SAB C513.Moreover, this solution lays stress on using as few on-chip hardware resources aspossible. A more excessive consumption of those resources will result in a highermaximum speed of the emulated interface.Due to the restricted performance of an 8 bit microcontroller a pin compatible solution isprovided only; the internal register based programming interface is replaced by a set ofsubroutine calls.The attached source files also contain a test shell, which demonstrates how to exchangeinformation between an on-chip HW-SSC and the emulated SW-SSC via 5 external wiresin different operation modes. It is based on the SAB C513 (Siemens 8 bit microcontroller).A table with load measurements is presented to give an indication for the fraction of CPUperformance required by software for emulating the SSC.

    標(biāo)簽: synchronous Emulating serial

    上傳時(shí)間: 2014-01-31

    上傳用戶:z1191176801

  • XA-S3的IIC接口的驅(qū)動(dòng)器軟件程序(C語(yǔ)言)

    The XA-S3 is a member of Philips Semiconductors’ XA (eXtended Architecture) family of high performance 16-bit single-chip Microcontrollers. The XA-S3 combines many powerful peripherals on one chip. therefore, it is suited for general multipurpose high performance embedded control functions.One of the on-chip peripherals is the I2C bus interface. This report describes worked-out driver software (written in C) to program / use the I2C interface of the XA-S3. The driver software, together with a demo program and interface software routines offer the user a quick start in writing a complete I2C - XAS3 system application.

    標(biāo)簽: XA-S IIC C語(yǔ)言 接口

    上傳時(shí)間: 2013-11-10

    上傳用戶:liaofamous

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