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two-stage

  • The same two-stage decoder as above. However, when transforming the symbols prior to Viterbi decodin

    The same two-stage decoder as above. However, when transforming the symbols prior to Viterbi decoding, the amplitude information is ignored and only the phase of the received symbol is employed in the metric computation stage.

    標簽: transforming two-stage However decoder

    上傳時間: 2015-07-05

    上傳用戶:sevenbestfei

  • 臨床醫藥試驗:Gehan s Two Stage Design

    臨床醫藥試驗:Gehan s Two Stage Design

    標簽: Design Gehan Stage Two

    上傳時間: 2013-12-10

    上傳用戶:qw12

  • 臨床醫藥試驗:Simon s Two stage Design

    臨床醫藥試驗:Simon s Two stage Design

    標簽: Design Simon stage Two

    上傳時間: 2014-01-10

    上傳用戶:weiwolkt

  • An unsatisfactory property of particle filters is that they may become inefficient when the observa

    An unsatisfactory property of particle filters is that they may become inefficient when the observation noise is low. In this paper we consider a simple-to-implement particle filter, called ‘LIS-based particle filter’, whose aim is to overcome the above mentioned weakness. LIS-based particle filters sample the particles in a two-stage process that uses information of the most recent observation, too. Experiments with the standard bearings-only tracking problem indicate that the proposed new particle filter method is indeed a viable alternative to other methods.

    標簽: unsatisfactory inefficient property particle

    上傳時間: 2014-01-11

    上傳用戶:大三三

  • 電流檢測電路中運算放大器與ADC的設計

    電學中的測量技術涉及范圍非常廣,電流測量在電學計量中占有非常重要的位置。如何精確地進行電流測量是精密測量的一大難題。傳統的電流檢測電路多采用運算放大芯片與片外電流檢測電路相結合的方式,電路集成度很低,需要較多的接口和資源才能完成對電路的檢測。本文把所有電路部分都集成在一塊芯片上,包括檢測電阻,運算放大器電路及模擬轉數字轉換電路,從而在電路內部可以進行電流檢測,使電路更好的集成化。前置電路使用二級共源共柵結構的運算放大器,減小溝道長度調制效應造成的電流誤差。10位SAR ADC中采用電容驅動能力強的傳輸門保證了模數轉化器的有效精度。比較器模塊采用再生鎖存器與遲滯比較器作為基礎單元組合解決精密測量的問題。本設計可以作為嵌入芯片內的一小部分而檢測芯片中的微小電流1mA~100mA,工作電壓在1.8v左右,電流檢測精度預期達到10uA的需求。The measurement technology in electricity involves a wide range,and current measurement plays a very important position in electrical measurement.How to accurately measure current is a big problem in precision measurement. The traditional current detecting circuit adopts the combination of the operational amplifier chip and theoff-chip current detecting circuit, The circuit integration is very low, and more interfaces and resources are needed tocomplete the circuit detection.This topic integrates all the circuit parts into one chip, including detection resistance, operational amplifier circuit andanalog to digital conversion circuit. Highly integrated circuit makes the external resources on the chip more intensive,so that current detection can be carried out inside the circuit, so that the circuit can be better integrated. Thefront-end circuit of this project uses two-stage cascade operational amplifier and cascade tube to reduce the currenterror caused by channel length modulation effect. In 10-bit SAR ADC, the transmission gate with strong capacitivedriving ability ensures the effective accuracy of the analog-to-digital converter. Comparator module uses regenerativelatch and hysteresis comparator as basic unit to solve the difficult problem of precision measurement. This topic can beused as a small part of the embedded chip to detect the micro-current in the chip 1 mA~100 mA, the working voltageis about 1.8v, and the current detection accuracy is expected to reach the requirement of 10 uA.

    標簽: 電流檢測 電路 運算放大器 adc

    上傳時間: 2022-04-03

    上傳用戶:

  • LPC1850 Cortex-M3內核微控制器數據手冊

    The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embeddedapplications. The ARM Cortex-M3 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC1850/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals. The ARMCortex-M3 CPU also includes an internal prefetch unit that supports speculativebranching.The LPC1850/30/20/10 include up to 200 kB of on-chip SRAM data memory, a quad SPIFlash Interface (SPIFI), a State Configuration Timer (SCT) subsystem, two High-speedUSB controllers, Ethernet, LCD, an external memory controller, and multiple digital andanalog peripherals.

    標簽: Cortex-M 1850 LPC 內核微控制器

    上傳時間: 2014-12-31

    上傳用戶:zhuoying119

  • LPC4300系列ARM雙核微控制器產品數據手冊

    The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cortex-M4 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC4350/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals, andincludes an internal prefetch unit that supports speculative branching. The ARMCortex-M4 supports single-cycle digital signal processing and SIMD instructions. Ahardware floating-point processor is integrated in the core.The LPC4350/30/20/10 include an ARM Cortex-M0 coprocessor, up to 264 kB of datamemory, advanced configurable peripherals such as the State Configurable Timer (SCT)and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers,Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals

    標簽: 4300 LPC ARM 雙核微控制器

    上傳時間: 2013-10-28

    上傳用戶:15501536189

  • 一個將數字轉換成文本(例如32轉換成thirty two)

    一個將數字轉換成文本(例如32轉換成thirty two)

    標簽: thirty two 轉換成 數字

    上傳時間: 2013-12-09

    上傳用戶:chongcongying

  • 機器人仿真平臺,和stage配合運行

    機器人仿真平臺,和stage配合運行

    標簽: stage 機器人 仿真平臺 運行

    上傳時間: 2015-01-09

    上傳用戶:luopoguixiong

  • Enter Two Numbers:26 35 the sum is 61 Enter Two Numbers:26 35 the sum is 61

    Enter Two Numbers:26 35 the sum is 61 Enter Two Numbers:26 35 the sum is 61

    標簽: Numbers Enter Two the

    上傳時間: 2014-01-13

    上傳用戶:1159797854

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