亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频

蟲蟲首頁| 資源下載| 資源專輯| 精品軟件
登錄| 注冊

ultra-wideband

  • Xilinx UltraScale:新一代架構滿足您的新一代架構需求(EN)

      中文版詳情瀏覽:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.   The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.   Some of the UltraScale architecture breakthroughs include:   • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%    • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability   • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization   • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard    • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets   • Greatly enhanced DSP and packet handling   The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.

    標簽: UltraScale Xilinx 架構

    上傳時間: 2013-11-13

    上傳用戶:瓦力瓦力hong

  • 基于碼本映射的語音帶寬擴展算法研究

    在現代通信系統中,電話語音的頻帶被限制在300 Hz~4 kHz的范圍內,帶來了語音可懂度和自然度的降低。為了在不增加額外成本的前提下提高語音的可懂度和自然度,進行了電話語音頻帶擴展的研究。提出了一種改進的基于碼本映射的語音帶寬擴展算法:在碼本映射的過程中,使用加權系數來得到映射碼本。客觀測試結果表明,用此算法得到的寬帶語音的譜失真度比用一般的碼本映射降低至少2%。主觀測試結果表明,用此算法得到的寬帶語音具有更好的可懂度和自然度。 Abstract:  In modern communication systems, the bandwidth of telephone speech is limited from 300Hz to 4 kHz, which reduces the intelligibility and naturalness of speech. Telephone speech bandwidth extension is researched to get wideband speech and to improve its intelligibility and naturalness, without increasing extra costs. This paper put forward an improved algorithm of speech bandwidth extension based on codebook mapping. In the process of codebook mapping, weighted coefficients were used to get mapping codebook. Objective tests show that spectral distortion of wideband speech obtained by this algorithm reduces at least 2%, comparing to conditional codebook mapping. Subjective tests show that the wideband speech obtained by this algorithm has better intelligibility and naturalness.

    標簽: 映射 帶寬 擴展 語音

    上傳時間: 2014-12-29

    上傳用戶:15501536189

  • Xilinx UltraScale:新一代架構滿足您的新一代架構需求(EN)

      中文版詳情瀏覽:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.   The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.   Some of the UltraScale architecture breakthroughs include:   • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%    • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability   • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization   • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard    • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets   • Greatly enhanced DSP and packet handling   The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.

    標簽: UltraScale Xilinx 架構

    上傳時間: 2013-11-21

    上傳用戶:wxqman

  • LT5528 WCDMA ACPR和AltCPR測量

      ACPR (adjacent channel power ratio), AltCPR (alternatechannel power ratio), and noise are important performancemetrics for digital communication systems thatuse, for example, WCDMA (wideband code division multipleaccess) modulation. ACPR and AltCPR are bothmeasures of spectral regrowth. The power in the WCDMAcarrier is measured using a 5MHz measurement bandwidth;see Figure 1. In the case of ACPR, the total powerin a 3.84MHz bandwidth centered at 5MHz (the carrierspacing) away from the center of the outermost carrier ismeasured and compared to the carrier power. The resultis expressed in dBc. For AltCPR, the procedure is thesame, except we center the measurement 10MHz awayfrom the center of the outermost carrier.

    標簽: AltCPR WCDMA 5528 ACPR

    上傳時間: 2013-11-02

    上傳用戶:maricle

  • 本系統是在asp版《在線文件管理器》的基礎上設計制作

    本系統是在asp版《在線文件管理器》的基礎上設計制作,取其精華,棄其糟粕,功能更強,效率更高,具有以下特點: 1。采用三層結構開發,程序邏輯和用戶界面徹底分離,可輕松換膚。 2。全部代碼采用Ultra Edit編寫,不使用任何可視化開發工具,精確控制代碼流程,確保代碼高效率運行。 3。自行開發自定義控件,不產生任何一丁點的HTML代碼冗余。 4。盡可能的減少客戶與服務器的交互,降低對服務器資源消耗,減少網絡傳輸。 5。真正多用戶系統,可分別為每個用戶設置可管理的文件類型,目錄等,上傳的單個文件大小限制等。 6。各用戶環境自由配置,風格自選(如果有多個風格的話),可自由設置每頁顯示的文件及目錄數等。 7。文件與目錄翻頁分開,即使管理同一目錄下的數萬個文件也不再出現程序超時現象。 8。功能強大,除了asp版具備的全部功能如上傳、下載、編輯、批量復制、移動、粘貼外還具備文件快速過濾搜索,智能修改文件屬性。 9。效率極高。經測試,在一太普通PC上對一個包含50000個文件的目錄進行瀏覽管理,任意翻頁,執行時間均不超過1秒。過濾或者搜索則更是低至僅0.3秒的執行時間。而windows資源管理器打開目錄或者asp版翻至最后一頁都需要6.5秒甚至更長時間。

    標簽: asp 文件管理

    上傳時間: 2015-04-01

    上傳用戶:kr770906

  • 本系統是在asp版《在線文件管理器》的基礎上設計制作

    本系統是在asp版《在線文件管理器》的基礎上設計制作,取其精華,棄其糟粕,功能更強,效率更高,具有以下特點: 1。采用三層結構開發,程序邏輯和用戶界面徹底分離,可輕松換膚。 2。全部代碼采用Ultra Edit編寫,不使用任何可視化開發工具,精確控制代碼流程,確保代碼高效率運行。 3。自行開發自定義控件,不產生任何一丁點的HTML代碼冗余。 4。盡可能的減少客戶與服務器的交互,降低對服務器資源消耗,減少網絡傳輸。 5。真正多用戶系統,可分別為每個用戶設置可管理的文件類型,目錄等,上傳的單個文件大小限制等。 6。各用戶環境自由配置,風格自選(如果有多個風格的話),可自由設置每頁顯示的文件及目錄數等。 7。文件與目錄翻頁分開,即使管理同一目錄下的數萬個文件也不再出現程序超時現象。 8。功能強大,除了asp版具備的全部功能如上傳、下載、編輯、批量復制、移動、粘貼外還具備文件快速過濾搜索,智能修改文件屬性。 9。效率極高。經測試,在一太普通PC上對一個包含50000個文件的目錄進行瀏覽管理,任意翻頁,執行時間均不超過1秒。過濾或者搜索則更是低至僅0.3秒的執行時間。而windows資源管理器打開目錄或者asp版翻至最后一頁都需要6.5秒甚至更長時間。

    標簽: asp 文件管理

    上傳時間: 2014-01-05

    上傳用戶:冇尾飛鉈

  • Abstract:Noise frequency modulation(FM)jamming。which belongs to blanket jamming。is already become t

    Abstract:Noise frequency modulation(FM)jamming。which belongs to blanket jamming。is already become the main form ofnoise jamming at present。because the wideband was gained by it.Tne spectnlnl ofnoise FM jamming is analyzed by time domain autocorrelation method in this paper.It’S jamm g peculiarity and幾out— putting signal’S jamming peculiarity ale explained.At last,these time series models ofnoise FM jalllIIling sig— nal and幾outputting signal ale built.

    標簽: jamming modulation frequency Abstract

    上傳時間: 2015-10-17

    上傳用戶:lijinchuan

  • Real-Time Transport Protocol (RTP) Payload Format and File Storage Format for the Adaptive Multi-Ra

    Real-Time Transport Protocol (RTP) Payload Format and File Storage Format for the Adaptive Multi-Rate (AMR) and Adaptive Multi-Rate Wideband (AMR-WB) Audio Codecs

    標簽: Format Real-Time Transport Protocol

    上傳時間: 2014-11-26

    上傳用戶:小草123

  • Squaring circuits are an important building block for impulse-radio UWB non-coherent receivers. This

    Squaring circuits are an important building block for impulse-radio UWB non-coherent receivers. This work proposes a squarer, based on the quadratic law of saturated transistors. Such a circuit has already been proposed for lower frequency applications, therefore this work focuses on the extension to ultra wide bandwidth, with particular care to the consequences related to the deviation from the ideal quadratic law of 0.18μm CMOS transistors.

    標簽: impulse-radio non-coherent important receivers

    上傳時間: 2013-12-24

    上傳用戶:kikye

  • 3rd Generation Partnership Project Technical Specification Group Services and System Aspects ANS

    3rd Generation Partnership Project Technical Specification Group Services and System Aspects ANSI-C code for the Fixed-point Extended AMR - Wideband (AMR-WB+) codec (Release 7)

    標簽: Specification Partnership Generation Technical

    上傳時間: 2017-02-24

    上傳用戶:wyc199288

主站蜘蛛池模板: 乐业县| 甘孜县| 抚顺市| 泽州县| 吐鲁番市| 西城区| 湖北省| 惠水县| 永寿县| 宜阳县| 驻马店市| 武宁县| 嘉荫县| 海口市| 安乡县| 靖安县| 江城| 犍为县| 南通市| 伽师县| 南充市| 资中县| 平乡县| 漳浦县| 密云县| 福海县| 淮安市| 翼城县| 汪清县| 永清县| 东阳市| 新乡县| 博客| 天峻县| 拜城县| 安平县| 霸州市| 焦作市| 信丰县| 和静县| 巴青县|