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uml-loan-system

  • This brief introduce a kind of the framework construction to materialize the system. And an example

    This brief introduce a kind of the framework construction to materialize the system. And an example was given with the discussion on the performence.

    標(biāo)簽: construction materialize introduce framework

    上傳時(shí)間: 2013-08-17

    上傳用戶:ysystc699

  • Building a RISC System in an FPGA

    Building a RISC System in an FPGA

    標(biāo)簽: Building System RISC FPGA

    上傳時(shí)間: 2013-09-04

    上傳用戶:朗朗乾坤

  • EDA系統(tǒng)軟件ispDesignExpert System 環(huán)境下進(jìn)行數(shù)字系統(tǒng)設(shè)計(jì)

    本設(shè)計(jì)的基本要求是以復(fù)雜可編程邏輯器件CPLD為基礎(chǔ),通過(guò)在EDA系統(tǒng)軟件ispDesignExpert System 環(huán)境下進(jìn)行數(shù)字系統(tǒng)設(shè)計(jì),熟練掌握該環(huán)境下的功能仿真,時(shí)間仿真,管腳鎖定和芯片下載。 本系統(tǒng)基本上比較全面的模擬了計(jì)數(shù)式數(shù)字頻率計(jì),廣泛應(yīng)用于工業(yè)、民用等各個(gè)領(lǐng)域,具有一定的開(kāi)發(fā)價(jià)值。

    標(biāo)簽: ispDesignExpert System EDA 系統(tǒng)軟件

    上傳時(shí)間: 2013-09-05

    上傳用戶:文993

  • System will automatically delete the directory

    System will automatically delete the directory

    標(biāo)簽: automatically directory System delete

    上傳時(shí)間: 2013-09-09

    上傳用戶:toyoad

  • VHDL,Verilog,System verilog比較

      本文簡(jiǎn)單討論并總結(jié)了VHDL、Verilog,System verilog 這三中語(yǔ)言的各自特點(diǎn)和區(qū)別As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers and organizationsare contemplating whether they shouldswitch from one HDL to another.

    標(biāo)簽: Verilog verilog System VHDL

    上傳時(shí)間: 2013-10-16

    上傳用戶:牛布牛

  • High-Speed Digital System Design

    Introduce High-Speed Digital System Design.

    標(biāo)簽: High-Speed Digital Design System

    上傳時(shí)間: 2013-10-20

    上傳用戶:gps6888

  • 基于System Generator的數(shù)字下變頻設(shè)計(jì)

    Xilinx公司推出的DSP設(shè)計(jì)開(kāi)發(fā)工具System Generator是在Matlab環(huán)境中進(jìn)行建模,是DSP高層系統(tǒng)設(shè)計(jì)與Xilinx FPGA之間實(shí)現(xiàn)的“橋梁”。在分析了FPGA傳統(tǒng)級(jí)設(shè)計(jì)方法的基礎(chǔ)上,提出了基于System Generator的系統(tǒng)級(jí)設(shè)計(jì)新方法,并應(yīng)用新方法設(shè)計(jì)驗(yàn)證了一套數(shù)字下變頻系統(tǒng),通過(guò)仿真和實(shí)驗(yàn)結(jié)果驗(yàn)證了該方法的有效性和準(zhǔn)確性。

    標(biāo)簽: Generator System 數(shù)字 變頻設(shè)計(jì)

    上傳時(shí)間: 2013-11-18

    上傳用戶:小草123

  • Control System of Stepp ingMot

    提出了一個(gè)由AT89C52單片機(jī)控制步進(jìn)電機(jī)的實(shí)例。可以通過(guò)鍵盤(pán)輸入相關(guān)數(shù)據(jù), 并根據(jù)需要, 實(shí)時(shí)對(duì)步進(jìn)電機(jī)工作方式進(jìn)行設(shè)置, 具有實(shí)時(shí)性和交互性的特點(diǎn)。該系統(tǒng)可應(yīng)用于步進(jìn)電機(jī)控制的大多數(shù)場(chǎng)合。實(shí)踐表明, 系統(tǒng)性能優(yōu)于傳統(tǒng)的步進(jìn)電機(jī)控制器。關(guān)鍵詞: 單片機(jī); 步進(jìn)電動(dòng)機(jī); 直流固態(tài)繼電器; 實(shí)時(shí)控制Con trol System of Stepp ingMotor Ba sed on AT89C52 ChipM icrocomputerMENGWu2sheng, L ILiang (College of Automatization, Northwestern Polytechnical Unversity, Xipan 710072, China)ABSTRACT: A stepp ing motor control system based on AT89C52 chip microcomputer was described.The data can be inputwith keyboard, and stepp ingmotorwas controlled by these data. According to the demand, users can set the workingmodel of stepp ingmotor in real2time. This system can be widely used in stepp ing motor controlling. The p ractice showed that the performance of this system outdid the tradi tional stepp ing motor controller.KEY WORDS: Chip microcomputer; Stepp ingmotor; DCSSR; Real2time control

    標(biāo)簽: Control System ingMot Stepp

    上傳時(shí)間: 2013-11-19

    上傳用戶:leesuper

  • The Linux Programming Interface - A Linux and UNIX System Programming Handbook

    The Linux Programming Interface - A Linux and UNIX System

    標(biāo)簽: Programming Linux Interface Handbook

    上傳時(shí)間: 2013-11-10

    上傳用戶:asdstation

  • ARM embeded system designer

    ARM embeded system designer,周立功版本,國(guó)內(nèi)較有名的一版。

    標(biāo)簽: designer embeded system ARM

    上傳時(shí)間: 2013-10-31

    上傳用戶:zaizaibang

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