The PCI Local bus concept was developed to break
the PC data I/O bottleneck and clearly opens the door
to increasing system speed and expansion capabilities.
The PCI Local bus moves high speed peripherals
from the I/O bus and places them closer to the system’s
processor bus, providing faster data transfers
between the processor and peripherals. The PCI Local
bus also addresses the industry’s need for a bus standard
which is not directly dependent on the speed,
size and type of system processor. It represents the
first microprocessor independent bus offering performance
more than adequate for the most demanding
applications such as full-motion video.
The PCI Local bus concept was developed to break
the PC data I/O bottleneck and clearly opens the door
to increasing system speed and expansion capabilities.
The PCI Local bus moves high speed peripherals
from the I/O bus and places them closer to the system’s
processor bus, providing faster data transfers
between the processor and peripherals. The PCI Local
bus also addresses the industry’s need for a bus standard
which is not directly dependent on the speed,
size and type of system processor. It represents the
first microprocessor independent bus offering performance
more than adequate for the most demanding
applications such as full-motion video.
Hardware reference
The PCI Local bus concept was developed to break
the PC data I/O bottleneck and clearly opens the door
to increasing system speed and expansion capabilities.
The PCI Local bus moves high speed peripherals
from the I/O bus and places them closer to the system’s
processor bus, providing faster data transfers
between the processor and peripherals. The PCI Local
bus also addresses the industry’s need for a bus standard
which is not directly dependent on the speed,
size and type of system processor. It represents the
first microprocessor independent bus offering performance
more than adequate for the most demanding
applications such as full-motion video.
User Manual
The I2C-bus specification
由于大規(guī)模集成電路技術(shù)的發(fā)展，在單個芯片集成CPU以及組成一個單獨工作系統(tǒng)所必須的ROM、RAM、I/O端口、A/D、D/A等外圍電路和已經(jīng)實現(xiàn)，這就是常說的單片機或微控制器。目前，世界上許多公司生產(chǎn)單片機，品種很多：包括各種字長的CPU，各種容量和品種的ROM、RAM，以及功能各異的I/O等等。但是，單片機品種規(guī)格有限，所以只能選用某種單片機再進行擴展。擴展的方法有兩種：一種是并行總線，另一種是串行總線。由于串行總線連線少，結(jié)構(gòu)簡單，往往不用專用的母板和插座而直接用導(dǎo)線連接各個設(shè)備即可。因此，采用串行總線大大簡化了系統(tǒng)硬件設(shè)計。PHILIPS公司早在十幾年就前推出了I2C串行總線，它是具備多主機系統(tǒng)所需的包括裁決和高低速設(shè)備同步等功能的高性能串行總線。
實現(xiàn)最優(yōu)二叉樹的構(gòu)造；在此基礎(chǔ)上完成哈夫曼編碼器與譯碼器。 假設(shè)報文中只會出現(xiàn)如下表所示的字符：
字符 A B C D E F G H I J K L M N
頻度 186 64 13 22 32 103 21 15 47 57 1 5 32 20 57
字符 O P Q R S T U V W X Y Z ， ．
頻度 63 15 1 48 51 80 23 8 18 1 16 1 6 2
要求完成的系統(tǒng)應(yīng)具備如下的功能：
1．初始化。從終端（文件）讀入字符集的數(shù)據(jù)信息，。建立哈夫曼樹。
2．編碼：利用已建好的哈夫曼樹對明文文件進行編碼，并存入目標(biāo)文件（哈夫曼碼文件）。
3．譯碼：利用已建好的哈夫曼樹對目標(biāo)文件（哈夫曼碼文件）進行編碼，并存入指定的明文文件。
4．輸出哈夫曼編碼文件：輸出每一個字符的哈夫曼編碼。
