使用MSP430與CS8900開(kāi)發(fā)網(wǎng)頁(yè)伺服器，可以動(dòng)態(tài)顯示MCU溫度.
上傳時(shí)間： 2017-06-03
上傳用戶(hù)：
//初始化 if(initscr() == NULL) { perror("initcurs") exit(EXIT_FAILURE) } //設(shè)置模式 cbreak() noecho() keypad(stdscr, TRUE) //建立窗口 win = newwin(h, w, 3, 20) box(win, 0, 0) keypad(win, TRUE) wmove(win, cury, curx) mvaddstr(16, 1, "Press arrow keys to move the cursor within the window.\n") mvaddstr(17, 1, "Press q to quit.\n") refresh() wrefresh(win)
標(biāo)簽： EXIT_FAILURE initcurs initscr perror
上傳時(shí)間： 2013-12-20
上傳用戶(hù)：FreeSky
The code performs a number (ITERS) of iterations of the Bailey s 6-step FFT algorithm (following the ideas in the CMU Task parallel suite). 1.- Generates an input signal vector (dgen) with size n=n1xn2 stored in row major order In this code the size of the input signal is NN=NxN (n=NN, n1=n2=N) 2.- Transpose (tpose) A to have it stored in column major order 3.- Perform independent FFTs on the rows (cffts) 4.- Scale each element of the resulting array by a factor of w[n]**(p*q) 5.- Transpose (tpose) to prepair it for the next step 6.- Perform independent FFTs on the rows (cffts) 7.- Transpose the resulting matrix The code requires nested Parallelism.
標(biāo)簽： iterations performs Bailey number
上傳時(shí)間： 2014-01-05
上傳用戶(hù)：libenshu01
學(xué)會(huì)一個(gè)程式語(yǔ)言，是一回事兒；學(xué)會(huì)如何以此語(yǔ)言設(shè)計(jì)並實(shí)作出有效的程式，又是一回事兒。C++ 尤其如此，因?yàn)樗懿粚こ５睾w了罕見(jiàn)的威力和豐富的表現(xiàn)力，不但建立在一個(gè)全功能的傳統(tǒng)語(yǔ)言（C）之上，更提供極為廣泛的物件導(dǎo)向（object-oriented）性質(zhì)，以及對(duì)templates 和exceptions（異常狀態(tài)）的支援。
標(biāo)簽： 程式
上傳時(shí)間： 2013-12-09
上傳用戶(hù)：ANRAN
走馬燈（燈光變幻）程序 內(nèi)容：用DIP的8位開(kāi)關(guān)控制走馬燈的花樣，用SW3控制走馬燈的起/停 運(yùn)行步驟:1.按下一次開(kāi)關(guān)SW3,開(kāi)始燈光變幻,再按下一次則停止 可重復(fù)進(jìn)行 * 2.按下SW3后，撥動(dòng)不同的數(shù)碼開(kāi)關(guān)DIP,就會(huì)出現(xiàn)不同的燈光變幻 * 3.按下"q"或者"Q",退出
上傳時(shí)間： 2017-06-21
上傳用戶(hù)：yepeng139
蟻群算法的MATLAB程序，提供變量初始化 C=[1304 2312 3639 1315 4177 2244 3712 1399 3488 1535 3326 1556 3238 1229 4196 1004 4312 790 4386 570 3007 1970 2562 1756 2788 1491 2381 1676 1332 695 3715 1678 3918 2179 4061 2370 3780 2212 3676 2578 4029 2838 4263 2931 3429 1908 3507 2367 3394 2643 3439 3201 2935 3240 3140 3550 2545 2357 2778 2826 2370 2975] m=31 Alpha=1 Beta=5 Rho=0.9 Q=100 NC_max=200
上傳時(shí)間： 2017-07-08
上傳用戶(hù)：wangyi39
模擬QPSK發(fā)射和接受的一個(gè)程序，帶I-Q修正，對(duì)于理解QPSK有很好的作用
上傳時(shí)間： 2017-07-12
上傳用戶(hù)：tianyi223
數(shù)字下變頻的Verilog程序，測(cè)試可以直接使用，將A/D信號(hào)下變頻為基帶I，Q兩路信號(hào)
標(biāo)簽： Verilog 數(shù)字下變頻 程序
上傳時(shí)間： 2014-01-19
上傳用戶(hù)：saharawalker
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標(biāo)簽： information providing available writing
上傳時(shí)間： 2017-07-22
上傳用戶(hù)：四只眼
RS_latch using vhdl, When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR (Not OR) logic gates. The stored bit is present on the output marked Q. Normally, in storage mode, the S and R inputs are both low, and feedback maintains the Q and Q outputs in a constant state, with Q the complement of Q. If S (Set) is pulsed high while R is held low, then the Q output is forced high, and stays high when S returns to low similarly, if R (Reset) is pulsed high while S is held low, then the Q output is forced low, and stays low when R returns to low.
標(biāo)簽： using fundamental the RS_latch
上傳時(shí)間： 2017-07-30
上傳用戶(hù)：努力努力再努力
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