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Automation-synthesis

  • Good morning, dear teachers. I am very glad to be here for your interview. my name is xx.I am 21 yea

    Good morning, dear teachers. I am very glad to be here for your interview. my name is xx.I am 21 years old. I come from Dafang, a small town of Guizhou province. My undergraduate period will be accomplished in East China Jiaotong University. I major in electrical engineering and automation. I am interesting in computer, especially in program design. I am a hard study student, especially in the things which I interesting in. I am a person with great perseverance. During the days I preparing for the postgraduate examination, I insist on study for more than 10 hours every day. Just owing to this, I could pass the first examination finally. I am also a person with great ambition.

    標簽: interview teachers morning Good

    上傳時間: 2014-01-11

    上傳用戶:釣鰲牧馬

  • DDR SDRAM控制器的VHDL源代碼

    DDR SDRAM控制器的VHDL源代碼,含詳細設計文檔。 The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock Manager (DCM) provides the required Delay Locked Loop (DLL), Digital Phase Shift (DPS), and Digital Frequency Synthesis (DFS) functions. This application note describes a controller design for a 16-bit DDR SDRAM. The application note and reference design are enhanced versions of XAPP200 targeted to the Virtex-II series of FPGAs. At a clock rate of 133 MHz, 16-bit data changes at both clock edges. The reference design is fully synthesizable and achieves 133 MHz performance with automatic place and route tools.

    標簽: SDRAM VHDL DDR 控制器

    上傳時間: 2014-11-01

    上傳用戶:l254587896

  • Visual Studio 6.0是Microsoft公司推出的一個可視化應用程序集成開發環境(IDE Integrate Develop Environment)。 Visual Studio

    Visual Studio 6.0是Microsoft公司推出的一個可視化應用程序集成開發環境(IDE Integrate Develop Environment)。 Visual Studio IDE不僅支持Visual C++,還支持Visual Basic、Visual J++、Visual InterDev等Microsoft系列開發工具。 本簡介介紹了通過 ActiveX Automation 接口顯示 AutoCAD 對象以及使用 Visual Basic for Applications 編程環境對這些對象進行編程的相關概念。

    標簽: Visual Studio Environment Microsoft

    上傳時間: 2013-12-16

    上傳用戶:sjyy1001

  • ECE345, Visual-to-Audio Electronic Travel Aid Code for TM320C54x (v2a.asm) download This project

    ECE345, Visual-to-Audio Electronic Travel Aid Code for TM320C54x (v2a.asm) download This project involves the design and implementation of a audio synthesis device that converts moving images into audio signals. The system is built on a TM320C54x DSP with interface to an IMAQ camera module via the serial port on a PC. Brief description: A LabVIEW VI acquires an image from the IMAQ camera module. It quantizes the image into a 5x5, 3-bit image, and sends the data to the TM320C54x DSP via a serial port. The TM320C54x DSP constructs a 64-tap FIR by combining a series of 64-tap head related transfer functions (HRTF) according to the incoming data, and then filters an input audio signal with this FIR filter, in effect creating a correspondence between the filtered signal and the original image.

    標簽: Visual-to-Audio Electronic download project

    上傳時間: 2017-02-01

    上傳用戶:笨小孩

  • 8051單片機源碼verilog版本 包括rtl

    8051單片機源碼verilog版本 包括rtl, testbench, synthesis

    標簽: verilog 8051 rtl 單片機

    上傳時間: 2014-01-14

    上傳用戶:yuanyuan123

  • 1. Learn the basic constructs of VHDL 2. Learn the modeling structure of VHDL 3. Understand the de

    1. Learn the basic constructs of VHDL 2. Learn the modeling structure of VHDL 3. Understand the design environments – Simulation – Synthesis

    標簽: the Learn VHDL Understand

    上傳時間: 2017-02-18

    上傳用戶:love_stanford

  • Many CAD users dismiss schematic capture as a necessary evil in the process of creating PCB layout

    Many CAD users dismiss schematic capture as a necessary evil in the process of creating PCB layout but we have always disputed this point of view. With PCB layout now offering automation of both component placement and track routing, getting the design into the computer can often be the most time consuming element of the exercise. And if you use circuit simulation to develop your ideas, you are going to spend even more time working on the schematic.

    標簽: schematic necessary creating dismiss

    上傳時間: 2014-01-25

    上傳用戶:WMC_geophy

  • In the bank all the activities are being done manually .As the bank widens its services & it finds d

    In the bank all the activities are being done manually .As the bank widens its services & it finds difficult to manage its operations manually and hence this leads to the automation of some of its operations. Banking Information system is a windows based applications. This project mainly deals with managing there types of account such as Saving Account, Current Account and Recurring Deposits . In this project bank is seeking to manage these account through computer based system. Tasks involved in this project are opening the user accounts , recording the account holders transactions , modify, the user records and generating the reports . This project is having three module: ] 1. Bank Master Module 2. Transaction Module 3. Reports module

    標簽: the bank activities manually

    上傳時間: 2013-12-13

    上傳用戶:LouieWu

  • This project mainly deals with automating the tasks of Purchasing, maintaining,manfactioring and tra

    This project mainly deals with automating the tasks of Purchasing, maintaining,manfactioring and transacting the goods.In the Inventory Automation System the key process includes the activities such as maintenance of stock details, maintenance of receipts and items etc. It is a tedious job to maintain all these details manually. Hence we opted to automate the Inventory Automation System.

    標簽: manfactioring maintaining Purchasing automating

    上傳時間: 2014-01-15

    上傳用戶:1427796291

  • The xapp851.zip archive includes the following subdirectories. The specific contents of each subdi

    The xapp851.zip archive includes the following subdirectories. The specific contents of each subdirectory below: \rtl - HDL design files \sim - simulation files \synth - Synthesis related files \par - Place/Route related files

    標簽: subdirectories The following includes

    上傳時間: 2014-01-25

    上傳用戶:lepoke

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