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  • 基于多點網絡的水廠自動監控系統設計

    基于多點網絡的水廠自動監控系統設計Design of MPI Based Automatic Monitoring and Control System in Water Works劉 美 俊(湖南工程學院,湘潭411101)摘要針對水廠工作水泵多、現場離控制站距離遠的特點,提出了一種基于MPI多點網絡的自動監控系統的設計方法,分析了系統的工作原理,介紹了系統中數據的采集與處理、主站與從站的通信原理以及系統軟件的設計。由于這種系統的主、從站PLC之間采用MPI網絡通信,具有運行可靠、性能價格比高的特點,所以適用于中小規模水廠的分布式監控場合。關鍵詞多點網絡主站從站監控系統Abstract Ina ccordancew ithth efe atuersof w aterw orks,i. e. ,manyp umpsin o perationa ndth ep umps, farfor mt hec ontrolst ation,th em ethodo fdesigninga na utomati(〕monitoringa ndc ontorlsy stemb asedo nM PIis p resented.Th eo perationalpr incipleo fth esy stemi san alyzed,th ed atac olection,data processing; communication Between master station and slave station as wel as design and system software are discussed. Because MPI network communicationis used among master station, slave stations and PLC, the system is reliable and high cost-efective. It is, suitable for smal and mediumsized water works for distrbuted monitoring and control.Keywords MPI Masterst ation Slaves tation Monitoringa ndc ontorlsy stem 自來 水 廠 的自動控制系統一般分為兩大部分,一對組態硬件要求較高,投資較大。相對而言,MPI網是水源地深水泵的工作控制,一是水廠區變頻恒壓供絡速度可達187.5 M bps,通過一級中繼器傳輸距離可水控制,兩部分的實際距離通常都比較遠。某廠水源達Ikm 。根據水廠的具體情況,確定以MPI方式組地有3臺深井泵給水廠區的蓄水池供水。水廠區的成網絡,主站PLC為S7-300系列的CPU3121FM,從任務是對水池的水進行消毒處理后,通過加壓泵向管站為S7-200系列的CPU222。這樣既滿足了系統要路恒壓供水。選用Siemens公司的S7系列可編程控求,又相對于Profibus網絡節省了三分之一的成本,制器(PLC)和上位機組成實時數據采集和監控系統, 這種分布式監控系統具有較高的性能價格比。系統對深水泵進行遠程控制,對供水泵采用變頻器進行恒中PLC的物理層采用RS - 485接口,網絡延伸選用壓控制以保證整個水廠的電機設備安全、可靠地運帶防雷保護的中繼器,使系統的安全運行得到了保行。證。MPI網絡的拓撲結構如圖1所示。1 多點網絡(NWI)監控系統的組成Sie me ns 公司S7系列PLC通常有MP」多點網絡與Profibus現場總線網絡兩種組網方式。Profibus現場總線的應用目前較為普遍,通用性較好,它由Profibus一DP, Profibus一FMS, Profibus一PA組成。Profibus - DP型用于分散外設間的數據傳輸,傳輸速率為9.6kbps一12Mbps,主要用于現場控制器與分散1/0之間的通信,可滿足交直流調速系統快速響應的時間要求,特別適合于加工自動化領域的應用;Profibus - FMS主要解決車間級通信問題,完成中等傳輸速度的循環或非循環數據交換任務,適用于紡織、樓宇自動化、可編程控制器、低壓開關等;Profibus - PA型采用了OSI模型的物理層和數據鏈路層,適用于過程自動化的總線類型。

    標簽: 多點 網絡 系統設計 自動監控

    上傳時間: 2013-10-09

    上傳用戶:fac1003

  • 基于DSP與FPGA的多視頻通道的切換控制

    為了擴大監控范圍,提高資源利用率,降低系統成本,提出了一種多通道視頻切換的解決方案。首先從視頻信號分離出行場信號,然后根據行場信號由DSP和FPGA產生控制信號,控制多路視頻通道之間的切換,從而實現讓一個視頻處理器同時監控不同場景。實驗結果表明,該方案可以在視頻監控告警系統中穩定、可靠地實現視頻通道的切換。 Abstract:  To expand the scope of monitoring, improve resource utilization, reduce system cost, a multiple video channels signal switching method is pointed out in this paper. First, horizontal sync signal and field sync signal from the video signal are separated, then control signal according to the sync signal by DSP and FPGA is generated to control the switching Between multiple video channels. Thus, it achieves to make a video processor to monitor different place. Experimental results show that the method can realize video channel switching reliably, and is applied in the video monitoring warning system successfully.

    標簽: FPGA DSP 視頻通道 切換控制

    上傳時間: 2013-11-09

    上傳用戶:不懂夜的黑

  • 《器件封裝用戶向導》賽靈思產品封裝資料

    Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections Between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.

    標簽: 封裝 器件 用戶 賽靈思

    上傳時間: 2013-10-22

    上傳用戶:ztj182002

  • XAPP520將符合2.5V和3.3V I/O標準的7系列FPGA高性能I/O Bank進行連接

    XAPP520將符合2.5V和3.3V I/O標準的7系列FPGA高性能I/O Bank進行連接  The I/Os in Xilinx® 7 series FPGAs are classified as either high range (HR) or high performance (HP) banks. HR I/O banks can be operated from 1.2V to 3.3V, whereas HP I/O banks are optimized for operation Between 1.2V and 1.8V. In circumstances that require an HP 1.8V I/O bank to interface with 2.5V or 3.3V logic, a range of options can be deployed. This application note describes methodologies for interfacing 7 series HP I/O banks with 2.5V and 3.3V systems

    標簽: XAPP FPGA Bank 520

    上傳時間: 2013-11-19

    上傳用戶:yyyyyyyyyy

  • XAPP807-封裝最小的三態以太網MAC處理引擎

    The Tri-Mode Ethernet MAC (TEMAC) UltraController-II module is a minimal footprint,embedded network processing engine based on the PowerPC™ 405 (PPC405) processor coreand the TEMAC core embedded within a Virtex™-4 FX Platform FPGA. The TEMACUltraController-II module connects to an external PHY through Gigabit Media IndependentInterface (GMII) and Management Data Input/Output (MDIO) interfaces and supports tri-mode(10/100/1000 Mb/s) Ethernet. Software running from the processor cache reads and writesthrough an On-Chip Memory (OCM) interface to two FIFOs that act as buffers Between thedifferent clock domains of the PPC405 OCM and the TEMAC.

    標簽: XAPP 807 MAC 封裝

    上傳時間: 2013-10-26

    上傳用戶:yuzsu

  • lm3s1601資料

    The revision history table notes changes made Between the indicated revisions of the LM3S1601 data sheet.

    標簽: s1601 1601 lm3 lm

    上傳時間: 2014-12-30

    上傳用戶:qq21508895

  • XAPP996-雙處理器參考設計套件

    This is the Xilinx Dual Processor Reference Designs suite. The designs illustrate a few differentdual-core architectures based on the MicroBlaze™ and PowerPC™ processors. The designsillustrate various concepts described in the Xilinx White Paper WP262 titled, “DesigningMultiprocessor Systems in Platform Studio”. There are simple software applications includedwith the reference designs that show various forms of interaction Between the two processors.

    標簽: XAPP 996 雙處理器 參考設計

    上傳時間: 2013-10-29

    上傳用戶:旭521

  • Rf And Microwave Power Amplifier Design(2005)

    The main objective of this book is to present all the relevant informationrequired for RF and micro-wave power amplifier design includingwell-known and novel theoretical approaches and practical design techniquesas well as to suggest optimum design approaches effectively combininganalytical calculations and computer-aided design. This bookcan also be very useful for lecturing to promote the analytical way ofthinking with practical verification by making a bridge Between theoryand practice of RF and microwave engineering. As it often happens, anew result is the well-forgotten old one. Therefore, the demonstrationof not only new results based on new technologies or circuit schematicsis given, but some sufficiently old ideas or approaches are also introduced,that could be very useful in modern practice or could contributeto appearance of new ideas or schematic techniques.

    標簽: Amplifier Microwave Design Power

    上傳時間: 2013-12-22

    上傳用戶:vodssv

  • 差分電路中單端及混合模式S-參數的使用

    Single-Ended and Differential S-Parameters Differential circuits have been important incommunication systems for many years. In the past,differential communication circuits operated at lowfrequencies, where they could be designed andanalyzed using lumped-element models andtechniques. With the frequency of operationincreasing beyond 1GHz, and above 1Gbps fordigital communications, this lumped-elementapproach is no longer valid, because the physicalsize of the circuit approaches the size of awavelength.Distributed models and analysis techniques are nowused instead of lumped-element techniques.Scattering parameters, or S-parameters, have beendeveloped for this purpose [1]. These S-parametersare defined for single-ended networks. S-parameterscan be used to describe differential networks, but astrict definition was not developed until Bockelmanand others addressed this issue [2]. Bockelman’swork also included a study on how to adapt single-ended S-parameters for use with differential circuits[2]. This adaptation, called “mixed-mode S-parameters,” addresses differential and common-mode operation, as well as the conversion Betweenthe two modes of operation.This application note will explain the use of single-ended and mixed-mode S-parameters, and the basicconcepts of microwave measurement calibration.

    標簽: 差分電路 單端 模式

    上傳時間: 2014-03-25

    上傳用戶:yyyyyyyyyy

  • hspice 2007下載 download

    解壓密碼:www.elecfans.com 隨著微電子技術的迅速發展以及集成電路規模不斷提高,對電路性能的設計 要求越來越嚴格,這勢必對用于大規模集成電路設計的EDA 工具提出越來越高的 要求。自1972 年美國加利福尼亞大學柏克萊分校電機工程和計算機科學系開發 的用于集成電路性能分析的電路模擬程序SPICE(Simulation Program with IC Emphasis)誕生以來,為適應現代微電子工業的發展,各種用于集成電路設計的 電路模擬分析工具不斷涌現。HSPICE 是Meta-Software 公司為集成電路設計中 的穩態分析,瞬態分析和頻域分析等電路性能的模擬分析而開發的一個商業化通 用電路模擬程序,它在柏克萊的SPICE(1972 年推出),MicroSim公司的PSPICE (1984 年推出)以及其它電路分析軟件的基礎上,又加入了一些新的功能,經 過不斷的改進,目前已被許多公司、大學和研究開發機構廣泛應用。HSPICE 可 與許多主要的EDA 設計工具,諸如Candence,Workview 等兼容,能提供許多重要 的針對集成電路性能的電路仿真和設計結果。采用HSPICE 軟件可以在直流到高 于100MHz 的微波頻率范圍內對電路作精確的仿真、分析和優化。在實際應用中, HSPICE能提供關鍵性的電路模擬和設計方案,并且應用HSPICE進行電路模擬時, 其電路規模僅取決于用戶計算機的實際存儲器容量。 The HSPICE Integrator Program enables qualified EDA vendors to integrate their products with the de facto standard HSPICE simulator, HSPICE RF simulator, and WaveView Analyzer™. In addition, qualified HSPICE Integrator Program members have access to HSPICE integrator application programming interfaces (APIs). Collaboration Between HSPICE Integrator Program members will enable customers to achieve more thorough design verification in a shorter period of time from the improvements offered by inter-company EDA design solutions.

    標簽: download hspice 2007

    上傳時間: 2013-11-10

    上傳用戶:123312

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