ET++ is a portable and homogenous object-oriented class library integrating user
interface building Blocks, basic data structures, and high level application framework
components. ET++ eases the building of highly interactive applications with consistent
user interfaces following the direct manipulation principle. The ET++ class library is
implemented in C++ and can be used on several operating systems and window system
platforms. Since its initial conception the class library has been continuously
redesigned and improved. It started with an architecture which was close to MacApp.
During several iterations a new and unique architecture evolved. A byproduct of the
ET++ project is a set of tools, which were designed to support the exploration of ET++
applications at run-time.
設計模式一書引用的主要參考例程，一個跨平臺的應用框架，基于C++實現，是學習面向對象的經典源碼.
This model simulates a six-degrees-of-freedom variable mass equations of motion with Simulink and Aerospace Blockset. This
model has been color coded to aid in locating Aerospace Blockset Blocks. The red Blocks are Aerospace Blockset Blocks, the orange Blocks are subsystems containing additional Aerospace Blockset Blocks and the white Blocks are Simulink Blocks.
This directory builds the miniport driver for Adaptec’s 1540 family of SCSI controllers. This driver exports several functions which are used by SCSIPORT.SYS to issue SCSI requests to the devices attached to the controller, process adapter interrupts, and various other SCSI activities.
This driver is also responsible for detecting non-Plug and Play 1540 SCSI controllers—the Plug and Play controllers are detected by the operating system—and for shutting down the controller during device removal or power management operations.
This sample also demonstrates the use of the SCSIWMI library to add WMI functionality to SCSI miniports. This library can be linked into a miniport and provides most of the framework needed to expose WMI data Blocks to SCSIPORT and the system.
The widespread use of embedded systems mandates the development of industrial software design methods, i.e. computer-aided design and engineering of embedded applications using formal models (frameworks) and standardized prefabricated components, much in the same way as in other mature areas of engineering such as mechanical engineering and electronics. These guidelines have been used to develop Component-based Design of Software for Embedded Systems (COMDES). The paper gives an overview of the COMDES framework, followed by a presentation of a generic component types, such as function Blocks, activities and function units. The execution of function units is discussed in the context of a newly developed execution model, i.e. timed-multitasking, which has been extended to distributed embedded systems.
This demo shows the BER performance of linear, decision feedback (DFE), and maximum likelihood sequence estimation (MLSE) equalizers when operating in a static channel with a deep null. The MLSE equalizer is invoked first with perfect channel knowledge, then with an imperfect, although straightforward, channel estimation algorithm. The BER results are determined through Monte Carlo simulation. The demo shows how to use these equalizers seamlessly across multiple Blocks of data, where equalizer state must be maintained between data Blocks.
A novel met hod t o p artially compensate sigma2delta shap ed noise is p rop osed. By injecting t he comp en2
sation cur rent int o t he p assive loop f ilte r during t he delay time of t he p hase f requency detect or ( PFD) , a maximum
reduction of t he p hase noise by about 16dB can be achieved. Comp a red t o ot he r compensation met hods , t he tech2
nique p rop osed he re is relatively simple and easy t o implement . Key building Blocks f or realizing t he noise cancel2
lation , including t he delay va riable PFD and comp ensation cur rent source , a re sp ecially designed. Bot h t he behavior
level and circuit level simulation results a re p resented.
Verilog Overview
n Basic Structure of a Verilog Model
n Components of a Verilog Module
– Ports
– Data Types
– Assigning Values and Numbers
– Operators
– Behavioral Modeling
• Continuous Assignments
• Procedural Blocks
– Structural Modeling
n Summary: Verilog Environment
In this paper, we propose
a hierarchical clustering method using visual, textual and link
analysis. By using a vision-based page segmentation algorithm, a
web page is partitioned into Blocks, and the textual and link information
of an image can be accurately extracted from the block containing
that image.
