The PCA9548A is an octal bidirectional translating switch controlled via the I2C-bus. TheSCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.An active LOW reset input allows the PCA9548A to recover from a situation where one ofthe downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets theI2C-bus state machine and causes all the channels to be deselected as does the internalPower-on reset function.
標(biāo)簽: channel 9548A 9548 PCA
上傳時間: 2013-10-13
上傳用戶:bakdesec
The TL2575 and TL2575HV represent superior alternatives to popular three-terminal linear regulators. Due totheir high efficiency, the devices significantly reduce the size of the heatsink and, in many cases, no heatsink isrequired. Optimized for use with standard series of inductors available from several different manufacturers, theTL2575 and TL2575HV greatly simplify the design of switch-mode power supplies by requiring a minimaladdition of only four to six external components for operation.
標(biāo)簽: STEP-DOWN SWITCHING SIMPLE 1A
上傳時間: 2013-11-20
上傳用戶:jelenecheung
Although Stellaris microcontrollers have generous internal SRAM capabilities, certain applicationsmay have data storage requirements that exceed the 8 KB limit of the Stellaris LM3S8xx seriesdevices. Since microcontrollers do not have an external parallel data-bus, serial memory optionsmust be considered. Until recently, the ubiquitous serial EEPROM/flash device was the only serialmemory solution. The major limitations of EEPROM and flash technology are slow write speed, slowerase times, and limited write/erase endurance.Recently, serial SRAM devices have become available as a solution for high-speed dataapplications. The N256S08xxHDA series of devices, from AMI Semiconductor, offer 32 K x 8 bits oflow-power data storage, a fast Serial Peripheral Interface (SPI) serial bus, and unlimited write cycles.The parts are available in 8-pin SOIC and compact TSSOP packages.
標(biāo)簽: Adding Serial SRAM 32
上傳時間: 2013-10-14
上傳用戶:cxl274287265
The ISO7220 and ISO7221 are dual-channel digital isolators. To facilitate PCB layout, the channels are orientedin the same direction in the ISO7220 and in opposite directions in the ISO7221. These devices have a logic inputand output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to4000 V. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, andprevent noise currents on a data bus or other circuits from entering the local ground and interfering with ordamaging sensitive circuitry.
標(biāo)簽: ISOLATORS DIGITAL DUAL
上傳時間: 2013-10-24
上傳用戶:hbsunhui
基于PIC單片機(jī)的脈沖電源:設(shè)計了一種金屬凝固過程用脈沖電源。該電源采用PIC16F877作為主控芯片,實現(xiàn)對窄脈沖電流幅值的檢測,以及時電流脈沖幅值根據(jù)模糊PID算法進(jìn)行閑環(huán)控制。使用結(jié)果表明:該電源的輸出脈沖波形良好,電流幅值穩(wěn)定,滿足合金材料凝固過程的工藝要求且運行穩(wěn)定可靠。關(guān)鍵詞:脈沖電源;PIC16F877單片機(jī);模糊PID;閑環(huán)控制 Abstract:A kind of pulse power supply was designed which uses in the metal solidification process ..I11is power supply used PIC16F877 to take the master control chip reali on to the narrow pulse electric current peak-to-peak value examination,carried on the closed-loop control to the electric current pulse peak-to-peak value basis fuzzy PID algorithm.The use result indicated ,this power supply output se profile is good,and the electric current peak-to-p~k value is stable,It satisfies the alloy material solidification process the technological requirement and movement stable reliable,Key words:p se po wer supply;PIC16F877single-chip microcontroller;f r PID;closed-loop control
上傳時間: 2013-10-27
上傳用戶:xcy122677
高壓雙管反激變換器的設(shè)計:介紹一種雙管反激的電路拓?fù)洌治隽似涔ぷ髟恚o出了一些關(guān)鍵技術(shù)參數(shù)的計算公式,設(shè)計并研制成功的30W 380V AC5 0H z/510V DC/+15.1 V DC(1A )、+5.2VDC(2A)輔助開關(guān)電源具有功率密度高、變換效率高、可靠性高等優(yōu)良的綜合性能。該變換器在高電壓輸人情況下有重要的應(yīng)用價值。【關(guān) 鍵 詞 】變換器,輔助開關(guān)電源,雙管反激 [Abstract】 A n e wt opologyfo rd oubles witchfl ybackc onverteris in troduced.Th eo perationp rincipleis a nalyzeda nds ome for mulas for calculating key parameters for the topology are presented. The designed and produced auxiliary switching power supply,i. e. 30W 380V AC5 0H z/5 10V DC/+15.1 V DC《1A )、+5.2 V DC《2A ),hase xcellentc omprehensivep erformances sucha sh ighp owerd ensity, hi ghc onversione fficiencya ndh ighr eliability.Th isc onverterh asim portanta pplicationv aluef orh igh input voltag [Keywords ]converter,au xiliary switchingp owers upply,do ubles witchf lybac
上傳時間: 2013-11-01
上傳用戶:Ants
摘要:本水位監(jiān)測報警器使用5V低壓直流電源(也可以用3節(jié)5號電池代替)就可以對5~15厘米的水位進(jìn)行監(jiān)測,用LED顯示和數(shù)碼管顯示水位,并可以對不再此范圍內(nèi)的水位發(fā)出報警。主要采用CD4066、74LS86、74LS32、CD4511芯片,再加上數(shù)碼管、蜂鳴器、發(fā)光二極管、電阻這些器件組成一個簡單而靈敏的監(jiān)測報警電路,操作簡單,接通電源即可工作。因為大部分電路采用數(shù)字電路,所以本水位監(jiān)測報警器還具有耗能低、準(zhǔn)確性高的特點。關(guān)鍵字:譯碼電路 報警電路 監(jiān)測電路 Abstract: The water level alarm monitoring the use of 5 V low-voltage DC power (can also use three batteries replaced on the 5th) will be able to 5 to 15 centimeters of water level monitoring, with LED display and digital display of water level, and this can no longer Within the scope of a water level alarm. Mainly CD4066, 74LS86, 74LS32, CD4511 chips, coupled with digital control, buzzer, light-emitting diode, the resistance of these devices composed of a simple and sensitive monitoring alarm circuits. Because the majority of circuits using digital circuitry, so the water level monitored alarm system also has low energy consumption, high accuracy of the characteristics. Keyword: Decoding circuit alarm circuit monitoring circuit
標(biāo)簽: 水位 監(jiān)測報警 系統(tǒng)原理
上傳時間: 2013-11-05
上傳用戶:王慶才
基于PIC單片機(jī)的低功耗讀卡器硬件設(shè)計:本文提出了一個完整的基于串口的智能讀卡器子系統(tǒng)設(shè)計方案并將其實現(xiàn)。讀卡器的設(shè)計突出了小型化的要求,全部器件使用貼片封裝。為了減小讀卡器的體積,設(shè)計中還使用了串口竊電的技術(shù),使用串口信號線直接給讀卡器供電。為此,讀卡器使用了省電的設(shè)計,采用了省電的集成電路,并大膽簡化了許多傳統(tǒng)的設(shè)計電路。關(guān)鍵字: 讀卡器, 單片機(jī), 串口竊電 Abstract: This paper aims to put forward a complete design of Smart IC card reader based onSerial Port and propose the way of realizing it for the purpose of Network Security. SMD isadopted to make Smart IC reader smaller in this design. To reduce the volume of Smart ICreader, Serial Port powered technology is employed to get power from the signal line of Serial Port. For this reason, low-power consumption components are adopted in the design and some traditional designs are simplified to reduce the power consumption.Keywords: Card Reader; Single-chip Computer; Serial Port Powered IC 卡系統(tǒng)保存了加密算法所需要的工作密鑰,供加密算法對網(wǎng)絡(luò)上傳輸?shù)臄?shù)據(jù)加密使用,是整個系統(tǒng)網(wǎng)絡(luò)安全的核心。在IC 卡子系統(tǒng)中,讀卡器是一個重要的部分。它起著管理IC卡、在IC 卡和PC或網(wǎng)絡(luò)計算機(jī)間傳遞數(shù)據(jù)的重要作用。本文以一片PIC單片機(jī)為核心完成了基于RS232 串口的讀卡器的硬件設(shè)計。
上傳時間: 2014-04-14
上傳用戶:wanghui2438
The P90CL301 is a highly integrated 16/32 bit micro-controller especially suitable for applications requiring lowvoltage and low power consumption. It is fully software compatible with the 68000. Furthermore, it provides bothstandard as well as advanced peripheral functions on-chip.One of these peripheral functions is the I2C bus. This report describes worked-out driver software (written in C) toprogram the P90CL301 I2C interface. It also contains interface software routines offering the user a quick start inwriting a complete I2C system application.
上傳時間: 2014-01-06
上傳用戶:氣溫達(dá)上千萬的
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.
上傳時間: 2014-04-02
上傳用戶:han_zh
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