graspForth is my humble attempt at a Forth-in-C that has the following goals: GCC ......... to support all 32-bit micros that GCC cross-compiles to. Relocatable . to be able to run in-place in either Flash or Ram. Fast ........ to be "not much" slower than an assembly based native Forth. Small ....... to fit-in approx 300 words in less than 25Kbytes on a 32-bit machine. Portable .... to achieve a 5 minute port to a new 32bit micro-processor, or micro-Controller.
標(biāo)簽： graspForth Forth-in-C following attempt
上傳時(shí)間： 2015-05-23
上傳用戶：tfyt
Samsung s S3C4510B 16/32-bit RISC microController is a cost-effective, high-performance microController solution for Ethernet-based systems. An integrated Ethernet Controller, the S3C4510B, is designed for use in managed communication hubs and routers.
標(biāo)簽： high-performance microController cost-effective microcontrol
上傳時(shí)間： 2014-03-03
上傳用戶：haohaoxuexi
The Davicom DM9008A NDIS CE miniport device driver is used to be the network component of the Microsoft WinCE.net enables hardware containing Davicom s fast ethernet Controller DM9008A
標(biāo)簽： component the miniport Davicom
上傳時(shí)間： 2013-12-24
上傳用戶：頂?shù)弥?/p>
Windows下讀寫硬件的工具. RW - Read & Write utility, for hardware engineers, firmware (BIOS) engineers, driver developers, QA engineers, performance test engineers, diagnostic engineers, etc., This utility access almost all the computer hardware, including PCI (PCI Express), PCI Index/Data, Memory, Memory Index/Data, I/O Space, I/O Index/Data, Super I/O, Clock Generator, DIMM SPD, SMBus Device, CPU MSR Registers, ATA/ATAPI Identify Data, ACPI Tables Dump (include AML decode), Embedded Controller, USB Information and LPT Remote Access. And also an Command Window is provided to access hardware manually.
標(biāo)簽： engineers firmware hardware Windows
上傳時(shí)間： 2015-07-01
上傳用戶：xc216
人工智能中模糊邏輯算法 FuzzyLib 2.0 is a comprehensive C++ Fuzzy Logic library for constructing fuzzy logic systems with multi-Controller support. It supports all commonly used shape functions and hedges, with full support for the various types of Aggregation, Correlation, Alphacut, Composition, Defuzzification methods. The latest version of the C++ Fuzzy Logic Class Library contains all the C++ source code and comes complete with a usage example for building a multi-Controllers fuzzy logic model.
標(biāo)簽： comprehensive constructing FuzzyLib library
上傳時(shí)間： 2013-12-17
上傳用戶：dbs012280
RW - Read & Write utility, for hardware engineers, firmware (BIOS) engineers, driver developers, QA engineers, performance test engineers, diagnostic engineers, etc., This utility access almost all the computer hardware, including PCI (PCI Express), PCI Index/Data, Memory, Memory Index/Data, I/O Space, I/O Index/Data, Super I/O, Clock Generator, DIMM SPD, SMBus Device, CPU MSR Registers, ATA/ATAPI Identify Data, ACPI Tables Dump (include AML decode), Embedded Controller, USB Information and LPT Remote Access. And also an Command Window is provided to access hardware manually. Website1: http://rw.net-forces.com/ Website2: http://home.kimo.com.tw/ckimchan.tw/ Website3: http://jacky5488.myweb.hinet.net/ For best view, please change the screen resolution to 1024 x 768 (or above) pixels.
標(biāo)簽： engineers developers firmware hardware
上傳時(shí)間： 2013-12-22
上傳用戶：王楚楚
RD1006--I2C與存儲器的IP 代碼及說明文檔，lattice提供，I2C Controller for Serial EEPROMs 源代碼可用，并且包含tb文件
上傳時(shí)間： 2014-12-06
上傳用戶：15071087253
verilog程序，實(shí)現(xiàn)兩個(gè)16bit數(shù)乘法，采用booth算法，基于狀態(tài)機(jī)實(shí)現(xiàn)，分層次為datapath和Controller兩個(gè)子模塊，testBench測試通過
上傳時(shí)間： 2015-08-13
上傳用戶：xinyuzhiqiwuwu
The cable compensation system is an experiment system that performs simulations of partial or microgravity environments on earth. It is a highly nonlinear and complex system.In this paper, a network based on the theory of the Fuzzy Cerebellum Model Articulation Controller(FCMAC) is proposed to control this cable compensation system. In FCMAC ,without appropriate learning rate, the control system based on FCMAC will become unstable or its convergence speed will become slow.In order to guarantee the convergence of tracking error, we present a new kind of optimization based on adaptive GA for selecting learning rate.Furthermore, this approach is evaluated and its performance is discussed.The simulation results shows that performance of the FCMAC based the proposed method is stable and more effective.
標(biāo)簽： system compensation simulations experiment
上傳時(shí)間： 2015-08-26
上傳用戶：希醬大魔王
Hard-decision decoding scheme Codeword length (n) : 31 symbols. Message length (k) : 19 symbols. Error correction capability (t) : 6 symbols One symbol represents 5 bit. Uses GF(2^5) with primitive polynomial p(x) = X^5 X^2 + 1 Generator polynomial, g(x) = a^15 a^21*X + a^6*X^2 + a^15*X^3 + a^25*X^4 + a^17*X^5 + a^18*X^6 + a^30*X^7 + a^20*X^8 + a^23*X^9 + a^27*X^10 + a^24*X^11 + X^12. Note: a = alpha, primitive element in GF(2^5) and a^i is root of g(x) for i = 19, 20, ..., 30. Uses Verilog description with synthesizable RTL modelling. Consists of 5 main blocks: SC (Syndrome Computation), KES (Key Equation Solver), CSEE (Chien Search and Error Evaluator), Controller and FIFO Register.
標(biāo)簽： symbols length Hard-decision Codeword
上傳時(shí)間： 2014-07-08
上傳用戶：曹云鵬
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