Internal Interrupts are used to respond to asynchronous requests from a certain part of themicrocontroller that needs to be serviced. Each peripheral in the TriCore as well as theBus Control Unit, the Debug Unit, the Peripheral Control Processor (PCP) and the CPUitself can generate an Interrupt Request.So what is an external Interrupt?An external Interrupt is something alike as the internal Interrupt. The difference is that anexternal Interrupt request is caused by an external event. Normally this would be a pulseon Port0 or Port1, but it can be even a signal from the input buffer of the SSC, indicatingthat a service is requested.The User’s Manual does not explain this aspect in detail so this ApNote will explain themost common form of an external Interrupt request. This ApNote will show that there is aneasy way to react on a pulse on Port0 or Port1 and to create with this impulse an InterruptService Request. Later in the second part of the document, you can find hints on how todebounce impulses to enable the use of a simple switch as the input device.Note: You will find additional information on how to setup the Interrupt System in theApNote “First steps through the TriCore Interrupt System” (AP3222xx)1. It would gobeyond the scope of this document to explain this here, but you will find selfexplanatoryexamples later on.
上傳時間： 2013-10-27
上傳用戶：zhangyigenius
I2C interface, is a very powerful tool for system designers. Theintegrated protocols allow systems to be completely software defined.Software development time of different products can be reduced byassembling a library of reusable software modules. In addition, themultimaster capability allows rapid testing and alignment ofend-products via external connections to an assembly-line computer.The mask programmable 87LPC76X and its EPROM version, the87LPC76X, can operate as a master or a slave device on the I2Csmall area network. In addition to the efficient interface to thededicated function ICs in the I2C family, the on-board interfacefacilities I/O and RAM expansion, access to EEPROM andprocessor-to-processor communications.
標簽： microcontro Using 76X LPC
上傳時間： 2013-12-30
上傳用戶：Artemis
1、程序的基本格式先介紹二條偽指令：EQU ——標號賦值偽指令ORG ——地址定義偽指令PIC16C5X在RESET后指令計算器PC被置為全“1”，所以PIC16C5X幾種型號芯片的復位地址為：PIC16C54/55：1FFHPIC16C56：3FFHPIC16C57/58：7FFH一般來說，PIC的源程序并沒有要求統一的格式，大家可以根據自己的風格來編寫。但這里我們推薦一種清晰明了的格式TITLE This is ⋯⋯ ；程序標題；--------------------------------------；名稱定義和變量定義；--------------------------------------F0 EQU 0RTCC EQU 1PC EQU 2STATUS EQU 3FSR EQU 4RA EQU 5RB EQU 6RC EQU 7┋PIC16C54 EQU 1FFH ；芯片復位地址PIC16C56 EQU 3FFHPIC16C57 EQU 7FFH；-----------------------------------------ORG PIC16C54 GOTO MAIN ；在復位地址處轉入主程序ORG 0 ；在0000H開始存放程序；-----------------------------------------；子程序區；-----------------------------------------DELAY MOVLW 255┋RETLW 0；------------------------------------------；主程序區；------------------------------------------MAINMOVLW B‘00000000’TRIS RB ；RB已由偽指令定義為6，即B口┋LOOPBSF RB，7 CALL DELAYBCF RB，7 CALL DELAY┋GOTO LOOP；-------------------------------------------END ；程序結束注:MAIN標號一定要處在0頁面內。2、程序設計基礎
上傳時間： 2013-11-14
上傳用戶：cjf0304
The STWD100 watchdog timer circuits are self-contained devices which prevent systemfailures that are caused by certain types of hardware errors (non-responding peripherals,bus contention, etc.) or software errors (bad code jump, code stuck in loop, etc.).The STWD100 watchdog timer has an input, WDI, and an output, WDO (see Figure 2). Theinput is used to clear the internal watchdog timer periodically within the specified timeoutperiod, twd (see Section 3: Watchdog timing). While the system is operating correctly, itperiodically toggles the watchdog input, WDI. If the system fails, the watchdog timer is notreset, a system alert is generated and the watchdog output, WDO, is asserted (seeSection 3: Watchdog timing).The STWD100 circuit also has an enable pin, EN (see Figure 2), which can enable ordisable the watchdog functionality. The EN pin is connected to the internal pull-downresistor. The device is enabled if the EN pin is left floating.
上傳時間： 2013-10-22
上傳用戶：taiyang250072
51匯編程序實例：舉一例說明：流水燈加數碼管 LOOP: ; 標號CLR P2.6 ;選中p2.6 數碼管左邊的8字使能SETB P2.7 ;p2.7不使能。 右邊的數碼管消隱MOV P0,#28H ;把28h送p0口；數碼管顯示 0LCALL DELAY ;延時MOV P0,#0FFH ;0ffh 送p0口，數碼管清除CLR P1.0 ;點亮p1.0發光管MOV P0,#7EH ;把7eh送p0口；數碼管顯示 1LCALL DELAYMOV P0,#0FFHCLR P1.1 ;點亮p1.0發光管CLR P1.0 ;點亮p1.0發光管MOV P0,#0A2H ;數碼管顯示 2LCALL DELAYMOV P0,#0FFHCLR P1.2CLR P1.1CLR P1.0MOV P0,#62H ;數碼管顯示 3LCALL DELAYMOV P0,#0FFHCLR P1.3CLR P1.2CLR P1.1CLR P1.0MOV P0,#74H ;數碼管顯示 4LCALL DELAYMOV P0,#0FFHCLR P1.4CLR P1.3CLR P1.2CLR P1.1CLR P1.0MOV P0,#61H ;數碼管顯示 5;LCALL DELAYMOV P0,#0FFHCLR P1.5CLR P1.4CLR P1.3CLR P1.2CLR P1.1CLR P1.0MOV P0,#21H ; 數碼管顯示 6LCALL DELAYMOV P0,#0FFHCLR P1.6CLR P1.5CLR P1.4CLR P1.3CLR P1.2CLR P1.1CLR P1.0MOV P0,#7AH ; 數碼管顯示 7LCALL DELAYMOV P0,#0FFHCLR P1.7CLR P1.6CLR P1.5CLR P1.4CLR P1.3CLR P1.2CLR P1.1CLR P1.0MOV P0,#20H ; 數碼管顯示 8LCALL DELAYMOV P0,#0FFHLCALL DELAYMOV P0,#0FFHMOV P1,#0FFH;程序到此結果為左邊的數碼管顯示0，1，2，3，4，5，6，7，8;p1.0------------p1.7指示燈依次點亮SETB P2.6 ; 左邊的8消隱CLR P2.7 ;選中p2.7 數碼管右邊的8字使能 ，；MOV P0,#28HLCALL DELAYMOV P0,#0FFHMOV P1,#0FFHCLR P1.0MOV P0,#7EHLCALL DELAYMOV P0,#0FFHMOV P1,#0FFHCLR P1.1MOV P0,#0A2HLCALL DELAYMOV P0,#0FFHMOV P1,#0FFHCLR P1.2MOV P0,#62HLCALL DELAYMOV P0,#0FFHMOV P1,#0FFHCLR P1.3MOV P0,#74HLCALL DELAYMOV P0,#0FFHMOV P1,#0FFHCLR P1.4MOV P0,#61HLCALL DELAYMOV P0,#0FFHMOV P1,#0FFHCLR P1.5MOV P0,#21HLCALL DELAYMOV P0,#0FFHMOV P1,#0FFHCLR P1.6MOV P0,#7AHLCALL DELAYMOV P0,#0FFHMOV P1,#0FFHCLR P1.7MOV P0,#20HLCALL DELAYMOV P0,#0FFHMOV P1,#0FFHMOV P0,#0FFHMOV P1,#0FFH;這一段和上一段基本相同， 不同的是右邊的數碼管依次顯示012345678，左邊的不亮；;同時p1口的燈流動顯示：AJMP LOOP; 注意： 程序運行到此跳轉到開始標號，重復執行：DELAY: ;延時子程序；參考前面的教程：CLR P3.3 ;注意小喇叭在3.3口， 這里可以使小喇叭發出嗒，嗒聲MOV R7,#255NOPNOPD1:MOV R6,#255setb p3.3D2: DJNZ R6,D2clr p3.3DJNZ R7,D1SETB P3.3RETENDLOOP: ； 標號CLR P2.6 ；選中p2.6 數碼管左邊的8字使能SETB P2.7 ；p2.7不使能。 右邊的數碼管消隱MOV P0,#28H ；把28h送p0口；數碼管顯示 0 ;28為1010000LCALL DELAY ； 延時程序MOV P0,#0FFH ；0ffh 送p0口，數碼管清除；P0口為11111111CLR P1.0 ；點亮p1.0發光管； P1。0為電平，P0口為11111110MOV P0,#7EH ；把7eh送p0口；數碼管顯示 1； P1。0為低電平，P0口為11111110LCALL DELAY ； 延時程序MOV P0,#0FFHMOV P0,#0FFH ；0ffh 送p0口，數碼管清除；P0口為11111111 清一次顯示這條是清顯示的
上傳時間： 2013-10-31
上傳用戶：gundamwzc
DSP從入門到精通全集EN
標簽： DSP
上傳時間： 2013-11-04
上傳用戶：caiqinlin
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽： UltraScale Xilinx 架構
上傳時間： 2013-11-13
上傳用戶：瓦力瓦力hong
This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System
上傳時間： 2013-11-05
上傳用戶：維子哥哥
很多不同的廠家生產各種型號的計算機，它們運行完全不同的操作系統，但TCP.IP協議族允許它們互相進行通信。這一點很讓人感到吃驚，因為它的作用已遠遠超出了起初的設想。T C P / I P起源于6 0年代末美國政府資助的一個分組交換網絡研究項目，到9 0年代已發展成為計算機之間最常應用的組網形式。它是一個真正的開放系統，因為協議族的定義及其多種實現可以不用花錢或花很少的錢就可以公開地得到。它成為被稱作“全球互聯網”或“因特網(Internet)”的基礎，該廣域網（WA N）已包含超過1 0 0萬臺遍布世界各地的計算機。本章主要對T C P / I P協議族進行概述，其目的是為本書其余章節提供充分的背景知識。 TCP.IP協議 縮略語 ACK (ACKnowledgment) TCP首部中的確認標志 API (Application Programming Interface) 應用編程接口 ARP (Address Resolution Protocol) 地址解析協議 ARPANET(Defense Advanced Research Project Agency NETwork) (美國)國防部遠景研究規劃局 AS (Autonomous System) 自治系統 ASCII (American Standard Code for Information Interchange) 美國信息交換標準碼 ASN.1 (Abstract Syntax Notation One) 抽象語法記法1 BER (Basic Encoding Rule) 基本編碼規則 BGP (Border Gateway Protocol) 邊界網關協議 BIND (Berkeley Internet Name Domain) 伯克利I n t e r n e t域名 BOOTP (BOOTstrap Protocol) 引導程序協議 BPF (BSD Packet Filter) BSD 分組過濾器 CIDR (Classless InterDomain Routing) 無類型域間選路 CIX (Commercial Internet Exchange) 商業互聯網交換 CLNP (ConnectionLess Network Protocol) 無連接網絡協議 CRC (Cyclic Redundancy Check) 循環冗余檢驗 CSLIP (Compressed SLIP) 壓縮的S L I P CSMA (Carrier Sense Multiple Access) 載波偵聽多路存取 DCE (Data Circuit-terminating Equipment) 數據電路端接設備 DDN (Defense Data Network) 國防數據網 DF (Don’t Fragment) IP首部中的不分片標志 DHCP (Dynamic Host Configuration Protocol) 動態主機配置協議 DLPI (Data Link Provider Interface) 數據鏈路提供者接口 DNS (Domain Name System) 域名系統 DSAP (Destination Service Access Point) 目的服務訪問點 DSLAM (DSL Access Multiplexer) 數字用戶線接入復用器 DSSS (Direct Sequence Spread Spectrum) 直接序列擴頻 DTS (Distributed Time Service) 分布式時間服務 DVMRP (Distance Vector Multicast Routing Protocol) 距離向量多播選路協議 EBONE (European IP BackbONE) 歐洲I P主干網 EOL (End of Option List) 選項清單結束 EGP (External Gateway Protocol) 外部網關協議 EIA (Electronic Industries Association) 美國電子工業協會 FCS (Frame Check Sequence) 幀檢驗序列 FDDI (Fiber Distributed Data Interface) 光纖分布式數據接口 FIFO (First In, First Out) 先進先出 FIN (FINish) TCP首部中的結束標志 FQDN (Full Qualified Domain Name) 完全合格的域名 FTP (File Transfer Protocol) 文件傳送協議 HDLC (High-level Data Link Control) 高級數據鏈路控制 HELLO 選路協議 IAB (Internet Architecture Board) Internet體系結構委員會 IANA (Internet Assigned Numbers Authority) Internet號分配機構 ICMP (Internet Control Message Protocol) Internet控制報文協議 IDRP (InterDomain Routing Protocol) 域間選路協議 IEEE (Institute of Electrical and Electronics Engineering) （美國）電氣與電子工程師協會 IEN (Internet Experiment Notes) 互聯網試驗注釋 IESG (Internet Engineering Steering Group) Internet工程指導小組 IETF (Internet Engineering Task Force) Internet工程專門小組 IGMP (Internet Group Management Protocol) Internet組管理協議 IGP (Interior Gateway Protocol) 內部網關協議 IMAP (Internet Message Access Protocol) Internet報文存取協議 IP (Internet Protocol) 網際協議 I RTF (Internet Research Task Force) Internet研究專門小組 IS-IS (Intermediate System to Intermediate System Protocol) 中間系統到中間系統協議 ISN (Initial Sequence Number) 初始序號 ISO (International Organization for Standardization) 國際標準化組織 ISOC (Internet SOCiety) Internet協會 LAN (Local Area Network) 局域網 LBX (Low Bandwidth X) 低帶寬X LCP (Link Control Protocol) 鏈路控制協議 LFN (Long Fat Net) 長肥網絡 LIFO (Last In, First Out) 后進先出 LLC (Logical Link Control) 邏輯鏈路控制 LSRR (Loose Source and Record Route) 寬松的源站及記錄路由 MBONE (Multicast Backbone On the InterNEt) Internet上的多播主干網 MIB (Management Information Base) 管理信息庫 MILNET (MILitary NETwork) 軍用網 MIME (Multipurpose Internet Mail Extensions) 通用I n t e r n e t郵件擴充 MSL (Maximum Segment Lifetime) 報文段最大生存時間 MSS (Maximum Segment Size) 最大報文段長度 M TA (Message Transfer Agent) 報文傳送代理 MTU (Maximum Transmission Unit) 最大傳輸單元 NCP (Network Control Protocol) 網絡控制協議 NFS (Network File System) 網絡文件系統 NIC (Network Information Center) 網絡信息中心 NIT (Network Interface Tap) 網絡接口栓（S u n公司的一個程序） NNTP (Network News Transfer Protocol) 網絡新聞傳送協議 NOAO (National Optical Astronomy Observatories) 國家光學天文臺 NOP (No Operation) 無操作 NSFNET (National Science Foundation NETwork) 國家科學基金網絡 NSI (NASA Science Internet) （美國）國家宇航局I n t e r n e t NTP (Network Time Protocol) 網絡時間協議 NVT (Network Virtual Terminal) 網絡虛擬終端 OSF (Open Software Foudation) 開放軟件基金 OSI (Open Systems Interconnection) 開放系統互連 OSPF (Open Shortest Path First) 開放最短通路優先 PAWS (Protection Against Wrapped Sequence number) 防止回繞的序號 PDU (Protocol Data Unit) 協議數據單元 POSIX (Portable Operating System Interface) 可移植操作系統接口 PPP (Point-to-Point Protocol) 點對點協議 PSH (PuSH) TCP首部中的急迫標志 RARP (Reverse Address Resolution Protocol) 逆地址解析協議 RFC (Request For Comments) Internet的文檔，其中的少部分成為標準文檔 RIP (Routing Information Protocol) 路由信息協議 RPC (Remote Procedure Call) 遠程過程調用 RR (Resource Record) 資源記錄 RST (ReSeT) TCP首部中的復位標志 RTO (Retransmission Time Out) 重傳超時 RTT (Round-Trip Time) 往返時間 SACK (Selective ACKnowledgment) 有選擇的確認 SLIP (Serial Line Internet Protocol) 串行線路I n t e r n e t協議 SMI (Structure of Management Information) 管理信息結構 SMTP (Simple Mail Transfer Protocol) 簡單郵件傳送協議 SNMP (Simple Network Management Protocol) 簡單網絡管理協議 SSAP (Source Service Access Point) 源服務訪問點 SSRR (Strict Source and Record Route) 嚴格的源站及記錄路由 SWS (Silly Window Syndrome) 糊涂窗口綜合癥 SYN (SYNchronous) TCP首部中的同步序號標志 TCP (Transmission Control Protocol) 傳輸控制協議 TFTP (Trivial File Transfer Protocol) 簡單文件傳送協議 TLI (Transport Layer Interface) 運輸層接口 TTL (Ti m e - To-Live) 生存時間或壽命 TUBA (TCP and UDP with Bigger Addresses) 具有更長地址的T C P和U D P Telnet 遠程終端協議 UA (User Agent) 用戶代理 UDP (User Datagram Protocol) 用戶數據報協議 URG (URGent) TCP首部中的緊急指針標志 UTC (Coordinated Universal Time) 協調的統一時間 UUCP (Unix-to-Unix CoPy) Unix到U n i x的復制 WAN (Wide Area Network) 廣域網 WWW (World Wide Web) 萬維網 XDR (eXternal Data Representation) 外部數據表示 XID (transaction ID) 事務標識符 XTI (X/Open Transport Layer Interface) X/ O p e n運輸層接口
上傳時間： 2013-11-13
上傳用戶：tdyoung
特點 最高輸入頻率 10KHz 顯示范圍0-9999（一段設定）0至999999累積量 計數速度 50/10000脈波/秒可選擇 輸入脈波具有預設刻度功能 累積量同步（批量）或非同步（批次）計數可選擇 數位化指撥設定操作簡易 計數暫時停止功能 1組報警功能 2:主要規格 脈波輸入型式: Jump-pin selectable current sourcing(NPN) or current sinking (PNP) 脈波觸發電位: HI bias (CMOS) (VIH=7.5V, VIL=5.5V) LO bias (TTL) (VIH=3.7V, VIL=2.0V) 最高輸入頻率: <10KHz (up,down,up/down mode) 輸出動作時間 : 0.1 to 99.9 second adjustable 輸出復歸方式: Manual(N) or automatic (R or C) can be modif 繼電器容量: AC 250V-5A, DC 30V-7A 顯示值范圍: 0-9999（PV,SV） 0-999999(TV) 顯示幕: Red high efficiency LEDs high 7.0mm (.276")(PV,SV) Red high efficiency LEDs high 9.2mm (.36")(TV) 參數設定方式: Touch switches 感應器電源: 12VDC +/-3%(<60mA) 記憶方式: Non-volatile E2PROM memory 絕緣耐壓能力: 2KVac/1 min. (input/output/power) 1600Vdc (input/output) 使用環境條件: 0-50℃(20 to 90% RH non-condensed) 存放環境條件: 0-70℃(20 to 90% RH non-condensed) CE認證: EN 55022:1998/A1:2000 Class A EN 61000-3-2:2000 EN 61000-3-3:1995/A1:2001 EN 55024:1998/A1:2001
上傳時間： 2013-10-24
上傳用戶：wvbxj
