Internal Interrupts are used to respond to asynchronous requests from a certain part of themicrocontroller that needs to be serviced. Each peripheral in the TriCore as well as theBus Control Unit, the Debug Unit, the Peripheral Control Processor (PCP) and the CPUitself can generate an Interrupt Request.So what is an external Interrupt?An external Interrupt is something alike as the internal Interrupt. The difference is that anexternal Interrupt request is caused by an external event. Normally this would be a pulseon Port0 or Port1, but it can be even a signal from the input buffer of the SSC, indicatingthat a service is requested.The User’s Manual does not explain this aspect in detail so this ApNote will explain themost common form of an external Interrupt request. This ApNote will show that there is aneasy way to react on a pulse on Port0 or Port1 and to create with this impulse an InterruptService Request. Later in the second part of the document, you can find hints on how todebounce impulses to enable the use of a simple switch as the input device.Note: You will find additional information on how to setup the Interrupt System in theApNote “First steps through the TriCore Interrupt System” (AP3222xx)1. It would gobeyond the scope of this document to explain this here, but you will find selfexplanatoryexamples later on.
上傳時間： 2013-10-27
上傳用戶：zhangyigenius
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.
上傳時間： 2014-04-02
上傳用戶：han_zh
The MC68HC05K0 is a low cost, low pin countsingle chip microcomputer with 504 bytes of userROM and 32 bytes of RAM. The MC68HC05K0 isa member of the 68HC05K series of devices whichare available in 16-pin DIL or SOIC packages.It uses the same CPU as the other devices in the68HC05 family and has the same instructions andregisters. Additionally, the device has a 15-stagemulti-function timer and 10 general purposebi-directional I/0 lines. A mask option is availablefor software programmable pull-downs on all ofthe I/O pins and four of the pins are capable ofgenerating interrupts.The device is ideally suited for remote-controlkeyboard applications because the pull-downs andthe interrupt drivers on the port pins allowkeyboards to be built without any externalcomponents except the keys themselves. There isno need for external pull-up or pull-down resistors,or diodes for wired-OR interrupts, as these featuresare already designed into the device.
上傳時間： 2014-01-24
上傳用戶：zl5712176
CAN與RS232轉換節點的設計與實現 介紹將CAN總線接口與RS232總線接口相互轉換的設計方法和2種總線電平轉換關系，實現CAN總線與各模塊的接口設計，制定了相應的軟硬件設計方案，并給出軟件設計流程圖以及部分硬件設計原理圖。為CAN總線與RS232總線互聯提供了一種方法，對CAN總線與RS232總線接口設備的互聯和廣泛應用的實現具有重要意義。關鍵詞：CAN總線；RS-232總線；串行通信Design and Realization of CAN and RS232 Transformation NodeZHOU Wei, CHENG Xiao-hong(Information Institute, Wuhan University of Technology, Wuhan 430070)【Abstract】This paper introduces one design method of the CAN bus interface and the RS232 bus interface interconversion, emphasizes two kindof bus level transformation relations, realizes the CAN bus and various modules connection design, formulates the design proposal of correspondingsoftware and hardware, and gives the flow chart of software design as well as the partial schematic diagram of hardware design. It providesonemethod for the CAN bus and the RS232 bus interconnection, has the vital significance to widespread application realization of the CAN busand theRS232 bus interface equipment interconnection.【Key words】CAN bus; RS-232 bus; serial communication
上傳時間： 2013-11-04
上傳用戶：leesuper
MCSÉ-51 Programmer's Guide and Instruction Set The information presented in this chapter is collected from the MCSÉ-51 Architectural Overview and the HardwareDescription of the 8051, 8052 and 80C51 chapters of this book. The material has been selected and rearranged toform a quick and convenient reference for the programmers of the MCS-51. This guide pertains specifically to the8051, 8052 and 80C51.
上傳時間： 2013-11-13
上傳用戶：hj_18
The STWD100 watchdog timer circuits are self-contained devices which prevent systemfailures that are caused by certain types of hardware errors (non-responding peripherals,bus contention, etc.) or software errors (bad code jump, code stuck in loop, etc.).The STWD100 watchdog timer has an input, WDI, and an output, WDO (see Figure 2). Theinput is used to clear the internal watchdog timer periodically within the specified timeoutperiod, twd (see Section 3: Watchdog timing). While the system is operating correctly, itperiodically toggles the watchdog input, WDI. If the system fails, the watchdog timer is notreset, a system alert is generated and the watchdog output, WDO, is asserted (seeSection 3: Watchdog timing).The STWD100 circuit also has an enable pin, EN (see Figure 2), which can enable ordisable the watchdog functionality. The EN pin is connected to the internal pull-downresistor. The device is enabled if the EN pin is left floating.
上傳時間： 2013-10-22
上傳用戶：taiyang250072
winCE msdn講座 XP Embedded Now and the future Windows XP Embedded Developmentand Deployment Model OverviewWindows XP Embedded Component ModelWindows XP Embedded Studio Tools Microsoft WindowsXP Embedded Product Highlights Componentized version of Windows XP Professional~ 12,000 components and updates as of Service Pack 2Flexible localizationSame binaries and API as Windows XP ProfessionalHotfixes and service packsEmbedded Enabling FeaturesRuns on standard PC hardwareSupports boot on hard drives, compact flash, DiskOnChipand read-only mediaSupport for remote install and remote bootHeadless device and remote management supportIntegration with Microsoft management tools
上傳時間： 2013-10-31
上傳用戶：jrsoft
基于變頻調速的水平連鑄機拉坯輥速度控制系統Frequency Inverter Based Drawing RollerS peedC ontrolSy stem ofHorizontal Continuous Casting MachineA 偉劉沖旅巴(南 華 大 學電氣工程學院，衡陽421001)摘要拉坯輥速度控制是水平連鑄工藝的關鍵技術之一，采用變頻器實現水平連鑄機拉坯輥速度程序控制，由信號發生裝置給變頻器提供程控信號。現場應用表明該控制系統速度響應快，控制精度高，滿足了水平連鑄生產的需要。關鍵詞水平連鑄拉坯輥速度程序控制變頻器Absh'act Speedc ontorlof dr awingor leris on eo fth ek eyte chnologiesfo rho rizontalco ntinuousca stingm achine.Fo rth ispu rpose,fr equencyco nverterisad optedfo rdr awingor lersp eedp rogrammablec ontorlof ho rizontalco ntinuousca stingm achine,th ep rogrammableco ntorlsi gnalto fr equencyc onverteris provided場a signal generator. The results of application show that the response of system is rapid and the control accuracy is high enough to meet thedemand of production of horizontal continuous casting.Keywords Horizontalco ntinuousc asting Drawingor ler Speedp rogrammablec ontrol Ferquencyin verter 隨著 現 代 化工業生產對鋼材需求量的日益增加，連鑄生產能力已經成為衡量一個國家冶金工業發展水平的重要指標之一。近十幾年來，水平連鑄由于具有投資少、鑄坯直、見效快等多方面的優點，國內許多鋼鐵企業利用水平連鑄機來澆鑄特種合金鋼，發揮了其獨特的優勢并取得了較好的經濟效益〔1,2)0采用 水 平 連鑄機澆鑄特種合金鋼時，由于拉坯機是水平連鑄系統中的關鍵設備之一，拉坯機及其控制性能的好壞直接影響著連鑄坯的質量，因此，連鑄的拉坯技術便成為整個水平連鑄技術的核心。由于鋼的冶煉過程是在高溫下進行的，鋼水溫度的變化又容易影響鑄坯的質量和成材率，因此，如何能在高溫環境下控制好與鑄坯速度相關的參數(拉、推程量，中停時間和拉坯頻率等)對于確保連鑄作業的進一步高效化，延長系統的連續作業時間十分關鍵。因此，拉坯輥速度控制技術是連鑄生產過程控制領域中的關鍵技術之- [31
上傳時間： 2013-10-12
上傳用戶：gxy670166755
針對使用硬件描述語言進行設計存在的問題，提出一種基于FPGA并采用DSP Builder作為設計工具的數字信號處理器設計方法。并按照Matlab/Simulink/DSP Builder/QuartusⅡ設計流程，設計了一個12階FIR 低通數字濾波器，通過Quartus 時序仿真及嵌入式邏輯分析儀SignalTapⅡ硬件測試對設計進行了驗證。結果表明，所設計的FIR 濾波器功能正確，性能良好。 Abstract: Aiming at the problems in designing DSP using HDL，a method of designing DSP based on FPGA which using DSP Builder as designed tool is pointed out.A 12-order low-pass FIR digital filter was designed according to the process of Matlab/Simulink/DSP Builder/QuartusⅡ, and the design was verified by the timing simulation based on QuartusⅡand practical test based on SignalTapⅡ. The result shows the designed filter is correct in function and good in performance.
上傳時間： 2013-11-17
上傳用戶：lo25643
在綜合分析諧波勵磁無刷同步發電機勵磁控制系統的基礎上,對其勵磁控制策略進行了研究,開發了一套基于DSP( TMS320F2812) 控制的新型柴油發電機勵磁控制系統,該系統采用參數自適應模糊PID 控制勵磁,選用交流采樣方式實時檢測各信號的瞬時特性,系統仿真結果以及在1 臺25 kW 工頻柴油發電機上的試驗結果證明了該控制器具有較好的電壓調節特性,系統穩態和暫態性能完全滿足發電機對勵磁系統的要求。關鍵詞:勵磁調節;模糊PID 控制;數字信號處理器;交流采樣 Abstract :According to the general analysis of the excitation cont rol system of the harmonious wave excitation brushless synchronous generator and it s characteristics ,a new type of diesel generator excitation cont rol system based on DSP( TMS320F2812) was designed. An adaptive fuzzy PID cont rol of excitation is used in this system. To detect the t ransient characteristics of the signals in a timely manner ,AC sampling was applied.The system simulation result s and the testing result s f rom a 25 kW diesel generator (50 Hz) can prove that the voltage regulation characteristics of the excitation cont rol system are very well ,and both the steadyOstate performance and the t ransient performance of the generator are also good.Key words :excitation cont rol ;fuzzy PID cont rol ;digital signal processor (DSP) ;AC sampling
上傳時間： 2013-10-29
上傳用戶：fxf126@126.com
