亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频

蟲蟲首頁| 資源下載| 資源專輯| 精品軟件
登錄| 注冊

ExpressPrinting System 安裝方法

  • modelsim使用的簡單的方法

    modelsim使用的簡單的方法

    標簽: modelsim

    上傳時間: 2014-01-10

    上傳用戶:龍飛艇

  • QuartusII9.0破解器和破解方法

    QuartusII9.0破解器和破解方法

    標簽: QuartusII 9.0 破解

    上傳時間: 2013-11-23

    上傳用戶:狗日的日子

  • 用veriloghdl進行fpga設計的一些基本方法

    veriloghdl進行fpga設計的一些基本方法,對初學者很有幫助

    標簽: veriloghdl fpga

    上傳時間: 2013-11-17

    上傳用戶:muhongqing

  • 基于FPGA的傳統DDS方法優化設計

    基于FPGA的傳統DDS方法優化設計

    標簽: FPGA DDS 優化設計

    上傳時間: 2014-12-28

    上傳用戶:lmeeworm

  • 基于FPGA的小數分頻實現方法

    基于FPGA的小數分頻實現方法

    標簽: FPGA 小數分頻 實現方法

    上傳時間: 2013-10-11

    上傳用戶:jiangxiansheng

  • FPGA設計重利用方法(Design Reuse Methodology)

      FPGAs have changed dramatically since Xilinx first introduced them just 15 years ago. In thepast, FPGA were primarily used for prototyping and lower volume applications; custom ASICswere used for high volume, cost sensitive designs. FPGAs had also been too expensive and tooslow for many applications, let alone for System Level Integration (SLI). Plus, the development

    標簽: Methodology Design Reuse FPGA

    上傳時間: 2013-10-23

    上傳用戶:旗魚旗魚

  • 擴頻通信芯片STEL-2000A的FPGA實現

    針對傳統集成電路(ASIC)功能固定、升級困難等缺點,利用FPGA實現了擴頻通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核實現NCO模塊,在下變頻模塊調用了硬核乘法器并引入CIC濾波器進行低通濾波,給出了DQPSK解調的原理和實現方法,推導出一種簡便的引入?仔/4固定相移的實現方法。采用模塊化的設計方法使用VHDL語言編寫出源程序,在Virtex-II Pro 開發板上成功實現了整個系統。測試結果表明該系統正確實現了STEL-2000A的核心功能。 Abstract:  To overcome drawbacks of ASIC such as fixed functionality and upgrade difficulty, FPGA was used to realize the core functions of STEL-2000A. This paper used the DDS IP core provided by ISE to realize the NCO module, called hard core multiplier and implemented CIC filter in the down converter, described the principle and implementation detail of the demodulation of DQPSK, and derived a simple method to introduce a fixed phase shift of ?仔/4. The VHDL source code was designed by modularity method , and the complete system was successfully implemented on Virtex-II Pro development board. Test results indicate that this system successfully realize the core function of the STEL-2000A.

    標簽: STEL 2000 FPGA 擴頻通信

    上傳時間: 2013-11-06

    上傳用戶:liu123

  • 基于FPGA的光纖光柵解調系統的研究

     波長信號的解調是實現光纖光柵傳感網絡的關鍵,基于現有的光纖光柵傳感器解調方法,提出一種基于FPGA的雙匹配光纖光柵解調方法,此系統是一種高速率、高精度、低成本的解調系統,并且通過引入雙匹配光柵有效地克服了雙值問題同時擴大了檢測范圍。分析了光纖光柵的測溫原理并給出了該方案軟硬件設計,綜合考慮系統的解調精度和FPGA的處理速度給出了基于拉格朗日的曲線擬合算法。 Abstract:  Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network, based on several existing methods of fiber grating sensor demodulation inadequate, a two-match fiber grating demodulation method was presented. This system is a high-speed, high precision, low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA,this paper gives the curve fitting algorithm based on Lagrange.

    標簽: FPGA 光纖光柵 解調系統

    上傳時間: 2014-07-24

    上傳用戶:caiguoqing

  • SOC驗證方法

    Prakash Rashinkar has over 15 years experience in system design and verificationof embedded systems for communication satellites, launch vehicles and spacecraftground systems, high-performance computing, switching, multimedia, and wirelessapplications. Prakash graduated with an MSEE from Regional Engineering College,Warangal, in India. He lead the team that was responsible for delivering themethodologies for SOC verification at Cadence Design Systems. Prakash is anactive member of the VSIA Functional Verification DWG. He is currently Architectin the Vertical Markets and Design Environments Group at Cadence.

    標簽: SOC 驗證方法

    上傳時間: 2014-01-24

    上傳用戶:xinhaoshan2016

  • 在FPGA中基于信元的FIFO設計方法實戰方法

      設計工程師通常在FPGA上實現FIFO(先進先出寄存器)的時候,都會使用由芯片提供商所提供的FIFO。但是,由于其通用性使得其針對性變差,某些情況下會變得不方便或者將增加硬件成本。此時,需要進行自行FIFO設計。本文提供了一種基于信元的FIFO設計方法以供設計者在適當的時候選用。這種方法也適合于不定長包的處理。

    標簽: FPGA FIFO 信元 設計方法

    上傳時間: 2014-01-13

    上傳用戶:mengmeng444425

主站蜘蛛池模板: 湖南省| 博野县| 开封县| 苗栗县| 灵石县| 松溪县| 广安市| 新郑市| 福安市| 南郑县| 巫溪县| 林周县| 凤台县| 夏津县| 乌兰察布市| 六枝特区| 郁南县| 东平县| 靖州| 阿拉善右旗| 上杭县| 来宾市| 林周县| 龙川县| 禹城市| 将乐县| 黑河市| 阜宁县| 肃宁县| 保亭| 皋兰县| 博野县| 昌邑市| 二连浩特市| 大名县| 汤阴县| 昆明市| 金昌市| 时尚| 荃湾区| 平谷区|