Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major FUNCTIONS of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上傳時間： 2013-10-22
上傳用戶：ztj182002
Field Programmable Gate Arrays (FPGAs) are becoming a critical part of every system design. Many vendors offer many different architectures and processes. Which one is right for your design? How do you design one of these so that it works correctly and FUNCTIONS as you expect in your entire system? These are the questions that this paper sets out to answer.
上傳時間： 2013-10-29
上傳用戶：lixqiang
針對傳統(tǒng)集成電路（ASIC）功能固定、升級困難等缺點，利用FPGA實現(xiàn)了擴頻通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核實現(xiàn)NCO模塊，在下變頻模塊調(diào)用了硬核乘法器并引入CIC濾波器進(jìn)行低通濾波，給出了DQPSK解調(diào)的原理和實現(xiàn)方法，推導(dǎo)出一種簡便的引入?仔/4固定相移的實現(xiàn)方法。采用模塊化的設(shè)計方法使用VHDL語言編寫出源程序，在Virtex-II Pro 開發(fā)板上成功實現(xiàn)了整個系統(tǒng)。測試結(jié)果表明該系統(tǒng)正確實現(xiàn)了STEL-2000A的核心功能。 Abstract: To overcome drawbacks of ASIC such as fixed functionality and upgrade difficulty, FPGA was used to realize the core FUNCTIONS of STEL-2000A. This paper used the DDS IP core provided by ISE to realize the NCO module, called hard core multiplier and implemented CIC filter in the down converter, described the principle and implementation detail of the demodulation of DQPSK, and derived a simple method to introduce a fixed phase shift of ?仔/4. The VHDL source code was designed by modularity method , and the complete system was successfully implemented on Virtex-II Pro development board. Test results indicate that this system successfully realize the core function of the STEL-2000A.
上傳時間： 2013-11-06
上傳用戶：liu123
This book is for students and Linux System Administrators. It provides the skills to read, write, and debug Linux shell scripts using bash shell. The book begins by describing Linux and simple scripts to automate frequently executed commands and continues by describing conditional logic, user interaction, loops, menus, traps, and FUNCTIONS.
上傳時間： 2014-12-30
上傳用戶：黃蛋的蛋黃
第一課 labview概述..................4 第一節(jié) 虛擬儀器（VI）的概念..4 第二節(jié) labview的操作模板........6 工具模板（Tools Palette）.........6 控制模板(Controls Palette).........7 功能模板(FUNCTIONS Palette).......8 第三節(jié) 創(chuàng)建一個VI程序..........10 1. 前面板...10 框圖程序..............11 從框圖程序窗口創(chuàng)建前面板對象................12 4. 數(shù)據(jù)流編程...............12 第四節(jié) 程序調(diào)試技術(shù)................13 1. 找出語法錯誤...........13 2. 設(shè)置執(zhí)行程序高亮...13 3. 斷點與單步執(zhí)行.......13 4. 探針.......14 第五節(jié) 練習(xí)1-1.....14 第六節(jié) 把一個VI程序作為子VI程序調(diào)用17 第七節(jié) 練習(xí)1-2.....18 第八節(jié) 練習(xí)1-3.....20 第九節(jié) 練習(xí)1-4.....22 第十節(jié) 練習(xí)1-5.....24 第二課 數(shù)據(jù)采集.......27 第一節(jié) 概述..........27 第二節(jié) 數(shù)據(jù)采集VI程序的調(diào)用方法..........29 第三節(jié) 模擬輸入與輸出............30 練習(xí)2-1...............31 第四節(jié) 波形的采集與產(chǎn)生........34 練習(xí)2-2...............35 第五節(jié) 掃描多個模擬輸入通道.36 練習(xí)2-3...............36 第六節(jié) 連續(xù)數(shù)據(jù)采集................37 練習(xí)2-4...............38 第三課 儀器控制.......40 第一節(jié) 概述..........40 第二節(jié) 串行通訊....40 第三節(jié) IEEE 488（GPIB）概述41 練習(xí)3-1...............43 第四節(jié) VISA編程...44
上傳時間： 2013-11-05
上傳用戶：nem567397
一篇長90頁的PPT和10個左右的示例源程序，對于自學(xué)能力強且有一定計算機編程基礎(chǔ)的人來說上手還是很快的。 •Understand the components of a Virtual Instrument •Introduce labview and common labview FUNCTIONS •Build a simple data acquisition application •Create a subroutine in labview
上傳時間： 2013-11-21
上傳用戶：yeling1919
Abstract: High-speed and low-speed data converters serve critical FUNCTIONS in modern broadband mobile radios. This application note outlines how todetermine high-speed data converter performance requirements in baseband sampling radio architectures. Also, system partition strategies andadvantages are outlined when considering a high-speed analog front-end (AFE) solution.
上傳時間： 2013-11-02
上傳用戶：jjj0202
The NXP LPC315x combine an 180 MHz ARM926EJ-S CPU core, High-speed USB 2.0OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, an integratedaudio codec, Li-ion charger, Real-Time Clock (RTC), and a myriad of serial and parallelinterfaces in a single chip targeted at consumer, industrial, medical, and communicationmarkets. To optimize system power consumption, the LPC315x have multiple powerdomains and a very flexible Clock Generation Unit (CGU) that provides dynamic clockgating and scaling.The LPC315x is implemented as multi-chip module with two side-by-side dies, one fordigital fuctions and one for analog FUNCTIONS, which include a Power Supply Unit (PSU),audio codec, RTC, and Li-ion battery charger.
上傳時間： 2014-01-17
上傳用戶：Altman
使用Nios II緊耦合存儲器教程 Chapter 1. Using Tightly Coupled Memory with the Nios II Processor Reasons for Using Tightly Coupled Memory . . . . . . . . . . . . . . . . . . . . . . . 1–1 Tradeoffs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1 Guidelines for Using Tightly Coupled Memory . . . .. . . . . . . . 1–2 Hardware Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2 Software Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . 1–3 Locating FUNCTIONS in Tightly Coupled Memory . . . . . . . . . . . . . 1–3 Tightly Coupled Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–4 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–4 Dual Port Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . 1–5 Building a Nios II System with Tightly Coupled Memory . . . . . . . . . . . 1–5
上傳時間： 2013-10-13
上傳用戶：黃婷婷思密達(dá)
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major FUNCTIONS of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上傳時間： 2013-11-21
上傳用戶：不懂夜的黑
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