PCI(外設部件互連)是當今個人計算機的主流總線結構，是微型計算機中處理器/存儲器與外圍控制部件、擴展卡之間的互連接口。PCI局部總線規范是互連機構的協議，也是電氣和機械配置的規范。 本書分為9章，涵蓋了PCI局部總線規范2.2版及其最新進展，詳細介紹了PCI局部總線的原理和操作，內容包括PCI局部總線的基本概念、信號的定義、總線的操作、電氣規范、機械規范、配置空間、66 Mhz規范、BIOS和PCI-PCI橋等。書中通過大量的時序波形和實例對PCI局部總線的實際應用進行了深入淺出的闡述。
上傳時間： 2013-12-16
上傳用戶：wangyi39
衛星調諧器 DBS TUNER The TA1322FN is a wideband down-converter which can operate at input frequency ranging from 850 Mhz to 2200 Mhz. Intended primarily for use in satellite tuners, this IC includes an oscillator, a mixer, an IF amplifier and a PLL.
標簽： down-converter frequency wideband operate
上傳時間： 2017-06-17
上傳用戶：xinyuzhiqiwuwu
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the USB signaling requirements. Today s gate arrays operate comfortably between 30 and 60 Mhz. With USB 2.0 signaling running at hundreds of Mhz, the existing design methodology must change.
標簽： technology 2.0 USB designed
上傳時間： 2014-01-02
上傳用戶：二驅蚊器
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the USB signaling requirements. Today s gate arrays operate comfortably between 30 and 60 Mhz. With USB 2.0 signaling running at hundreds of Mhz, the existing design methodology must change.
標簽： technology 2.0 USB designed
上傳時間： 2017-07-05
上傳用戶：zhoujunzhen
Chip type : ATmega16L Program type : Application Clock frequency : 4.000000 Mhz Memory model : Small External SRAM size : 0 Data Stack size : 256
標簽： type Application frequency 4.000000
上傳時間： 2014-01-08
上傳用戶：lx9076
Omap2420適合基于Linux、Windows和Symbian操作系統(OS)的高端手機應用。它是Omap 2系列產品中的第一款，而Omap2系列最終將會轉向“調制解調和應用處理器”的混合領域。或許這款芯片最吸引人的地方就是多處理器內核，它包含了330Mhz的ARM 11 RISC、220 Mhz的TI C55 DSP、內含ARM7的成像和視頻處理器，以及支持166 Mhz移動DDR SDRAM的Imagination Technologies公司3-D圖形處理器。該芯片還集成了顯示和相機控制器、SDRAM和閃存控制器，并附加了60多個外圍控制器。Omap 2420能夠為高端多媒體應用提供強大支持，這些應用包括30fps通用中間格式(CIF)的視頻會議、30fps的VGA編解碼、VGA和TV顯示，以及300萬像素以上的相機。使用該芯片的手機設計已經進行了一段時間，估計馬上就會投放市場
標簽： Omap Windows Symbian Linux
上傳時間： 2017-08-06
上傳用戶：agent
PTR2000 的Pin6 ( PWR) 與AT89C51 的P1. 0 相連,PTR2000 的Pin7 (TXEN) 與AT89C51 的P1. 1 相連,CS 直接接地,利用工作頻道1 ,即433. 92 Mhz. 通過匯編語言對其編程.
上傳時間： 2014-01-11
上傳用戶：qilin
1 系統功能 本系統擬定對頻率范圍在1~50 kHz左右的TTL電平脈沖序列進行多路延遲處理。各路延遲時間分別由單片機動態設定，最大延遲時間為1 ms，最大分辨率為0.15 ns級。 3 方案實現 系統選用Actel公司的ProASIC3 A3P250芯片實現數字部分。系統時鐘由外部50 Mhz晶振提供，時鐘引腳連接到FPGA的CCC全局時鐘引腳上；頻率可以通過FPGA內部的PLL實現倍頻和分頻，設定需要的頻率。由于在多路脈沖延遲方案中電路的同步是保證控制正確的條件，所以應該首先為電路提供一個基準脈沖。
標簽： FPGA的多路可控脈沖延遲
上傳時間： 2015-04-25
上傳用戶：justgo123
LPC1700系列ARM是基于第二代ARM Cortex-M3內核的微控制器，是為嵌入式系統應用而設計的高性能、低功耗的32位微處理器，適用于儀器儀表、工業通訊、電機控制、燈光控制、報警系統等領域。其操作頻率高達120Mhz，采用3級流水線和哈佛結構，帶獨立的本地指令和數據總線以及用于外設的低性能的第三條總線，使得代碼執行速度高達1.25MIPS/Mhz，并包含1個支持隨機跳轉的內部預取指單元。 LPC1700系列ARM增加了一個專用的Flash存儲器加速模塊，使得在Flash中運行代碼能夠達到較理想的性能。
標簽： lpc1752
上傳時間： 2016-03-04
上傳用戶：hahaha456
The TAS3204 is a highly-integrated audio system-on-chip (SOC) consisting of a fully-programmable, 48-bit digital audio processor, a 3:1 stereo analog input MUX, four ADCs, four DACs, and other analog functionality. The TAS3204 is programmable with the graphical PurePath Studio? suite of DSP code development software. PurePath Studio is a highly intuitive, drag-and-drop environment that minimizes software development effort while allowing the end user to utilize the power and flexibility of the TAS3204’s digital audio processing core. TAS3204 processing capability includes speaker equalization and crossover, volume/bass/treble control, signal mixing/MUXing/splitting, delay compensation, dynamic range compression, and many other basic audio functions. Audio functions such as matrix decoding, stereo widening, surround sound virtualization and psychoacoustic bass boost are also available with either third-party or TI royalty-free algorithms. The TAS3204 contains a custom-designed, fully-programmable 135-Mhz, 48-bit digital audio processor. A 76-bit accumulator ensures that the high precision necessary for quality digital audio is maintained during arithmetic operations. Four differential 102 dB DNR ADCs and four differential 105 dB DNR DACs ensure that high quality audio is maintained through the whole signal chain as well as increasing robustness against noise sources such as TDMA interference. The TAS3204 is composed of eight functional blocks: Clocking System Digital Audio Interface Analog Audio Interface Power supply Clocks, digital PLL I2C control interface 8051 MCUcontroller Audio DSP – digital audio processing 特性 Digital Audio Processor Fully Programmable With the Graphical, Drag-and-Drop PurePath Studio? Software Development Environment 135-Mhz Operation 48-Bit Data Path With 76-Bit Accumulator Hardware Single-Cycle Multiplier (28 × 48)
上傳時間： 2016-05-06
上傳用戶：fagong
