annie is an ANN, ie, Artificial Neural Network library developed in C++. It can be used to implement various kinds of neural networks like Multi-Layer Perceptron, Radial basis function networks, Hopfield networks etc.
Single-layer neural networks can be trained using various learning algorithms. The best-known algorithms are the Adaline, Perceptron and Backpropagation algorithms for supervised learning. The first two are specific to single-layer neural networks while the third can be generalized to multi-layer perceptrons.
人工智能中模糊邏輯算法
FuzzyLib 2.0 is a comprehensive C++ Fuzzy Logic library for constructing fuzzy logic systems with multi-controller support.
It supports all commonly used shape functions and hedges, with full support for the various types of Aggregation, Correlation, Alphacut, Composition, Defuzzification methods.
The latest version of the C++ Fuzzy Logic Class Library contains all the C++ source code and comes complete with a usage example for building a multi-controllers fuzzy logic model.
Welcome to PMOS. PMOS is a set of modules, mostly written in Modula-2,
to support multitasking. PMOS was designed primarily with real-time
applications in mind. It is not an operating system in the conventional
sense rather, it is a collection of modules which you can import
into your own programs, and which in particular allow you to write
multi-threaded programs.
This book is about the management of business processes. This is certainly
not a new topic. Since the beginning of the Industrial Revolution, it
has been written about from every possible point of view—economic,
sociological, psychological, accountancy, mechanical engineering and
business administration. In this book, we examine the management of
business processes from the perspective of computing, or—to put it more
broadly—of information technology. The reason is that information
technology has made huge leaps forward in recent years, resulting in
the creation of completely new ways of organizing business processes.
The development of generic software packages for managing business
processes—so-called workflow management systems (WFMS)—is particularly
important in this respect.
關于FPGA流水線設計的論文
This work investigates the use of very deep pipelines for
implementing circuits in FPGAs, where each pipeline
stage is limited to a single FPGA logic element (LE). The
architecture and VHDL design of a parameterized integer
array multiplier is presented and also an IEEE 754
compliant 32-bit floating-point multiplier. We show how to
write VHDL cells that implement such approach, and how
the array multiplier architecture was adapted. Synthesis
and simulation were performed for Altera Apex20KE
devices, although the VHDL code should be portable to
other devices. For this family, a 16 bit integer multiplier
achieves a frequency of 266MHz, while the floating point
unit reaches 235MHz, performing 235 MFLOPS in an
FPGA. Additional cells are inserted to synchronize data,
what imposes significant area penalties. This and other
considerations to apply the technique in real designs are
also addressed.
The application wizard has created this SoccerDoctor application for
you. This application not only demonstrates the basics of using the Microsoft
Foundation Classes but is also a starting point for writing your application.
