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  • 基于MSP430單片機和DS18B20的數字溫度計

    為了在工業生產及過程控制中準確測量溫度,設計了一種基于低功耗MSP430單片機的數字溫度計。整個系統通過單片機MSP430F1121A控制DS18B20讀取溫度,采用數碼管顯示,溫度傳感器DS18B20與單片機之間通過串口進行數據傳輸。MSP430系列單片機具有超低功耗,且外圍的整合性高,DS18B20只需一個端口即可實現數據通信,連接方便。通過多次實驗證明,該系統的測試結果與實際環境溫度一致,除了具有接口電路簡單、測量精度高、誤差小、可靠性高等特點外,其低成本、低功耗的特點使其擁有更廣闊的應用前景。 Abstract:  In Order to obtain accurate measuring temperature in industrial production and process control, a digital thermometer based on MSP430 MCU is designed. The system uses MSP430F1121A MCU to control DS18B20, and gets the temperature data, which is displayed on the LED. The temperature sensor DS18B20 and MCU transmit data through serial communication. MSP430 series has ultra-low power and high integration, DS18B20 only needs one port to achieve data communication. Through many experimental results prove, this system is consistent with actual environment temperature. The system has characteristics of interface circuit simple, high measuring accuracy, minor error, high reliability, besides, the characteristics of low cost and low power make it having vaster application prospect.

    標簽: MSP 430 18B B20

    上傳時間: 2013-10-16

    上傳用戶:wettetw

  • SUNPLUSIT編程工具Q-Writer使用說明書

    Important Notice SUNPLUS INNOVATION TECHNOLOGY INC. reserves the right to change this documentation without prior notice.  Information provided by SUNPLUS INNOVATION TECHNOLOGY INC.  is believed to be accurate and reliable.  However, SUNPLUS INNOVATION TECHNOLOGY INC.makes no warranty for any errors which may appear in this document.  Contact SUNPLUS INNOVATION TECHNOLOGY INC.to obtain the latest version of device specifications before placing your Order.  No responsibility is assumed by SUNPLUS INNOVATION TECHNOLOGY INC. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUSIT products are not authorized for use as critical components  in life support systems or aviation systems, where a malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of SunplusIT

    標簽: SUNPLUSIT Q-Writer 編程工具 使用說明書

    上傳時間: 2013-10-13

    上傳用戶:brain kung

  • TMS320C6000 Assembly Language

    Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their productsor to discontinue any product or service without notice, and advise customers to obtain the latestversion of relevant information to verify, before placing Orders, that information being relied onis current and complete. All products are sold subject to the terms and conditions of sale suppliedat the time of Order acknowledgement, including those pertaining to warranty, patentinfringement, and limitation of liability.

    標簽: Assembly Language C6000 320C

    上傳時間: 2013-11-12

    上傳用戶:chens000

  • Input Signal Rise and Fall Tim

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in Order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.

    標簽: Signal Input Fall Rise

    上傳時間: 2013-10-23

    上傳用戶:copu

  • 介紹C16x系列微控制器的輸入信號升降時序圖及特性

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in Order to avoidmultiple capture events.

    標簽: C16x 微控制器 輸入信號 時序圖

    上傳時間: 2014-04-02

    上傳用戶:han_zh

  • MPC7400 Part Number Speci&THOR

    MPC7400 Part Number SpeciÞcationThis document describes part number speciÞc changes to recommended operating conditions and revised electrical speciÞcations,as applicable, from those described in the generalMPC7400 Hardware SpeciÞcations.SpeciÞcations provided in this Part Number SpeciÞcation supersede those in theMPC7400 Hardware SpeciÞcationsdated 9/99(Order #: MPC7400EC/D) for these part numbers only; speciÞcations not addressed herein are unchanged. This document isfrequently updated, refer to the website at http://www.mot.com/SPS/PowerPC/ for the latest version.Note that headings and table numbers in this data sheet are not consecutively numbered. They are intended to correspond to theheading or table affected in the general hardware speciÞcation.

    標簽: Number Speci 7400 Part

    上傳時間: 2014-12-28

    上傳用戶:huyahui

  • MPC7400l零件號碼規范說明

    This document describes part number speciÞc changes to recommended operating conditions and revised electrical speciÞcations,as applicable, from those described in the generalMPC7400 Hardware SpeciÞcations.SpeciÞcations provided in this Part Number SpeciÞcation supersede those in theMPC7400 Hardware SpeciÞcationsdated 9/99(Order #: MPC7400EC/D) for these part numbers only; speciÞcations not addressed herein are unchanged. This document isfrequently updated, refer to the website at http://www.mot.com/SPS/PowerPC/ for the latest version.Note that headings and table numbers in this data sheet are not consecutively numbered. They are intended to correspond to theheading or table affected in the general hardware speciÞcation.Part numbers addressed in this document are listed in Table A. For more detailed Ordering information see Table B.

    標簽: 7400l 7400 MPC 零件

    上傳時間: 2013-11-19

    上傳用戶:qiaoyue

  • 基于DSP Builder數字信號處理器的FPGA設計

    針對使用硬件描述語言進行設計存在的問題,提出一種基于FPGA并采用DSP Builder作為設計工具的數字信號處理器設計方法。并按照Matlab/Simulink/DSP Builder/QuartusⅡ設計流程,設計了一個12階FIR 低通數字濾波器,通過Quartus 時序仿真及嵌入式邏輯分析儀SignalTapⅡ硬件測試對設計進行了驗證。結果表明,所設計的FIR 濾波器功能正確,性能良好。 Abstract:  Aiming at the problems in designing DSP using HDL,a method of designing DSP based on FPGA which using DSP Builder as designed tool is pointed out.A 12-Order low-pass FIR digital filter was designed according to the process of Matlab/Simulink/DSP Builder/QuartusⅡ, and the design was verified by the timing simulation based on QuartusⅡand practical test based on SignalTapⅡ. The result shows the designed filter is correct in function and good in performance.

    標簽: Builder FPGA DSP 數字信號處理器

    上傳時間: 2013-11-17

    上傳用戶:lo25643

  • TMS320C54x DSP 的cpu和外圍設備

    Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their productsor to discontinue any product or service without notice, and advise customers to obtain the latestversion of relevant information to verify, before placing Orders, that information being relied onis current and complete. All products are sold subject to the terms and conditions of sale suppliedat the time of Order acknowledgement, including those pertaining to warranty, patentinfringement, and limitation of liability

    標簽: 320C TMS 320 C54

    上傳時間: 2013-12-26

    上傳用戶:凌云御清風

  • 使用CCS進行DSP編程

    CCStudio Platinum Edition is available in a number of ways. Existingcustomers who are up-to-date with their subscription service withTexas Instruments will receive their update automatically on a CD inthe mail. New customers who wish to purchase a copy of CCStudioPlatinum Edition can Order TMDSCCSALL-1 starting May 23, 2005. A120-day Trial version will be also be available on CDROM startingJuly 11, 2005. Users may Order the CDROM of the 120-day free copy

    標簽: CCS DSP 編程

    上傳時間: 2014-12-28

    上傳用戶:gououo

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