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  • BGA布線指南

    BGA布線指南 BGA CHIP PLACEMENT AND ROUTING RULE BGA是PCB上常用的組件,通常CPU、NORTH BRIDGE、SOUTH BRIDGE、AGP CHIP、CARD BUS CHIP…等,大多是以bga的型式包裝,簡言之,80﹪的高頻信號及特殊信號將會由這類型的package內拉出。因此,如何處理BGA package的走線,對重要信號會有很大的影響。 通常環繞在BGA附近的小零件,依重要性為優先級可分為幾類: 1. by Pass。 2. clock終端RC電路。 3. damping(以串接電阻、排組型式出現;例如memory BUS信號) 4. EMI RC電路(以dampin、C、pull height型式出現;例如USB信號)。 5. 其它特殊電路(依不同的CHIP所加的特殊電路;例如CPU的感溫電路)。 6. 40mil以下小電源電路組(以C、L、R等型式出現;此種電路常出現在AGP CHIP or含AGP功能之CHIP附近,透過R、L分隔出不同的電源組)。 7. pull low R、C。 8. 一般小電路組(以R、C、Q、U等型式出現;無走線要求)。 9. pull height R、RP。 中文DOC,共5頁,圖文并茂

    標簽: BGA 布線

    上傳時間: 2013-04-24

    上傳用戶:cxy9698

  • 外掛硬盤和FLASH的MP3播放器解決方案

    ·詳細說明:外掛硬盤和FLASH的MP3播放器解決方案,用C和匯編編寫,并附帶有電路原理圖- Outside hangs the hard disk and the FLASH MP3 player solution, with C and the assembly compilation, and has the electric circuit schematic diagram in Pass

    標簽: FLASH MP3 硬盤 播放器

    上傳時間: 2013-06-12

    上傳用戶:yangbo69

  • 基于開關電容技術的鎖定放大器設計

    鎖定放大是微弱信號檢測的重要手段。基于相關檢測理論,利用開關電容的開關實現鎖定放大器中乘法器的功能,提出開關電容和積分器相結合以實現相關檢測的方法,并設計出一種鎖定放大器。該鎖定放大器將微弱信號轉化為與之相關的方波,通過后續電路得到正比于被測信號的直流電平,為后續采集處理提供方便。測量數據表明鎖定放大器前級可將10-6 A的電流轉換為10-1 V的電壓,后級通過帶通濾波器級聯可將信號放大1×105倍。該方法在降低噪聲的同時,可對微弱信號進行放大,線性度較高、穩定性較好。 Abstract:  Lock-in Amplifying(LIA)is one of important means for weak signal detection. Based on cross-correlation detection theory, switch in the swithched capacitor was used as multiplier of LIA, and a new method of correlation detection was proposed combining swithched capacitor with integrator. A kind of LIA was designed which can convert the weak signal to square-wave, then DC proportional to measured signal was obtained through follow-up conditioning circuit, providing convenience for signal acquisition and processing. The measured data shows that the electric current(10-6 A) can be changed into voltage(10-1 V) by LIA, and the signal is magnified 1×105 times by cascade band-Pass filter. The noise is suppressed and the weak signal is amplified. It has the advantages of good linearity and stability.

    標簽: 開關電容 鎖定放大器

    上傳時間: 2013-11-29

    上傳用戶:黑漆漆

  • 基于C8051F310的山路轉彎預防警示系統

    針對盤山路存在的轉彎盲區,即在轉彎時司機無法得知彎路對面是否有車輛通過,設計一種基于C8051F310的山路轉彎預防警示系統。該系統利用一階濾波算法檢測山路轉彎時是否有車輛通過。運用該算法可增強系統檢測的實時性,提高檢測機動車輛的靈敏度,同時大大減少環境溫度對檢測的干擾。試驗表明該系統能夠正確指示出在山路轉彎時是否有車輛通過,目前該系統已安裝在盤山路上,可大大減少事故的發生率。 Abstract:  Aiming at Passing hilly road,there is a turn blind spot.Motormen usually do not know if the Passing of vehicles Pass the road.So a system of defending accident on hilly road is designed,which is based on MCU C8051F310.The sys-tem uses the first-order filter algorithm to detect whether there are Passing vehicles.This algorithm enhances the real-time detection and improves the sensitivity of detection vehicles.Meanwhile,it reduces the detection interference of environmen-tal temperature.The experimental results show that this system can exactly indicate if there are Passing vehicles.At present,the system has been successfully applied to hilly road.The system can greatly decrease accident.

    標簽: C8051F310 轉彎

    上傳時間: 2013-10-10

    上傳用戶:歸海惜雪

  • Input Signal Rise and Fall Tim

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals Pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to Pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to Pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.

    標簽: Signal Input Fall Rise

    上傳時間: 2013-10-23

    上傳用戶:copu

  • 介紹C16x系列微控制器的輸入信號升降時序圖及特性

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals Pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to Pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to Pass through the undefined area within these 400ns in order to avoidmultiple capture events.

    標簽: C16x 微控制器 輸入信號 時序圖

    上傳時間: 2014-04-02

    上傳用戶:han_zh

  • 帶通濾波器設計計算

    摘 要:用一種新的思路和方法,先計算低通、再計算高通濾波器的有關參數,然后組合成帶通濾波器.關鍵詞:濾波器;參數;新思路中圖分類號: TN713. 5  文獻識別碼:B  文章編號:1008 - 1666 (1999) 04 - 0089 - 03A New Consideration of the Band Filter’s CalculationGuo Wencheng( S hao Yang B usiness and Technology school , S haoyang , Hunan ,422000 )Abstract :This essay deals with a new method of calculating the band filters - first calculatingthe relevant parameters of low - Pass filters ,then calculating the ones of high - Pass filters.Key words :filter ; parameters ;new considercation八十年代后,信息產業得到了迅猛發展. 帶通濾波器在微波通信、廣播電視和精密儀器設備中得到了廣泛應用. 帶通濾波器性能的優劣,對提高接收機信噪比,防止鄰近信道干擾,提高設備的技術指標,有著十分重要的意義.我在長期的教學實踐中,用切比雪夫型方法設計、計算出寬帶濾波器集中參數元件的數據. 該濾波器可運用在檢測微波頻率的儀器和其他設備中. 再將其思路和計算方法介紹給大家,供參考.

    標簽: 帶通濾波器設計 計算

    上傳時間: 2014-12-28

    上傳用戶:Yukiseop

  • 基于DSP Builder數字信號處理器的FPGA設計

    針對使用硬件描述語言進行設計存在的問題,提出一種基于FPGA并采用DSP Builder作為設計工具的數字信號處理器設計方法。并按照Matlab/Simulink/DSP Builder/QuartusⅡ設計流程,設計了一個12階FIR 低通數字濾波器,通過Quartus 時序仿真及嵌入式邏輯分析儀SignalTapⅡ硬件測試對設計進行了驗證。結果表明,所設計的FIR 濾波器功能正確,性能良好。 Abstract:  Aiming at the problems in designing DSP using HDL,a method of designing DSP based on FPGA which using DSP Builder as designed tool is pointed out.A 12-order low-Pass FIR digital filter was designed according to the process of Matlab/Simulink/DSP Builder/QuartusⅡ, and the design was verified by the timing simulation based on QuartusⅡand practical test based on SignalTapⅡ. The result shows the designed filter is correct in function and good in performance.

    標簽: Builder FPGA DSP 數字信號處理器

    上傳時間: 2013-11-17

    上傳用戶:lo25643

  • HDMI一致性測試

      The high defi nition multimedia interface (HDMI) is fastbecoming the de facto standard for Passing digitalaudio and video data in home entertainment systems.This standard includes an I2C type bus called a displaydata channel (DDC) that is used to Pass extended digitalinterface data (EDID) from the sinkdevice (such as adigital TV) to the source device (such as a digital A/Vreceiver). EDID includes vital information on the digitaldata formats that the sink device can accept. The HDMIspecifi cation requires that devices have less than 50pFof input capacitance on their DDC bus lines, which canbe very diffi cult to meet. The LTC®4300A’s capacitancebuffering feature allows devices to Pass the HDMI DDCinput capacitance compliance test with ease.

    標簽: HDMI 測試

    上傳時間: 2013-11-21

    上傳用戶:tian126vip

  • 基于MASON公式的多功能二階通用濾波器設計

    基于通用集成運算放大器,利用MASON公式設計了一個多功能二階通用濾波器,能同時或分別實現低通、高通和帶通濾波,也能設計成一個正交振蕩器。電路的極點頻率和品質因數能夠獨立、精確地調節。電路使用4個集成運放、2個電容和11個電阻,所有集成運放的反相端虛地。利用計算機仿真電路的通用濾波功能、極點頻率和品質因數的獨立控制和正交正弦振蕩,從而證明該濾波器正確有效。 Abstract:  A new multifunctional second-order filter based on OPs was presented by MASON formula. Functions, such as high-Pass, band-Pass, low-Pass filtering, can be realized respectively and simultaneously, and can become a quadrature oscillator by modifying resistance ratio. Its pole angular frequency and quality factor can be tuned accurately and independently. The circuit presented contains four OPs, two capacitors, and eleven resistances, and inverting input of all OPs is virtual ground. Its general filtering, the independent control of pole frequency and quality factor and quadrature sinusoidal oscillation were simulated by computer, and the result shows that the presented circuit is valid and effective.

    標簽: MASON 多功能 二階 濾波器設計

    上傳時間: 2013-10-09

    上傳用戶:13788529953

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