This library implements the KLT Tracking algorithm [2004] for Feature Tracking in Video useful in computer vision tasks like object recognition, image indexing, tracking and structure from motion. This implementation uses Programmable Graphics Hardware to achieve considerable speedup in the running time of the GPU-based implementation.
標簽： Tracking implements algorithm Feature
上傳時間： 2013-12-19
上傳用戶：WMC_geophy
In this work an implementation of a geometric nonlinear controller for chaos synchronization in a Field Programmable Gate Array (FPGA) is presented. The Lorenz chaotic system is used to show the implementation of chaos synchronization via nonlinear controller implemented in a Xilinx FPGA Virtex-II 2v2000ft896-4. The main idea is to design a nonlinear geometric controller which synchronizes a slave Lorenz system to a master system and then implement them into the FPGA.
標簽： synchronization implementation controller geometric
上傳時間： 2013-12-17
上傳用戶：3到15
In this paper, a new method is introduced to implement chaotic generators based on the Henon map and Lorenz chaotic generators given by the state equations using the Field Programmable Gate Array (FPGA). The aim of this method is to increase the frequency of the chaotic generators. The new method is based on the MATLAB® Software, Xilinx System Generator, Xilinx Alliance tools and Synplicity Synplify.
標簽： introduced generators implement chaotic
上傳時間： 2017-07-24
上傳用戶：qq521
A spatiotemporal chaotic map is digitized to develop a highly paralleled PRBS generator that accommodates to FPGA (Field Programmable Gate Array) implementation in present paper.
標簽： spatiotemporal paralleled digitized generator
上傳時間： 2013-12-12
上傳用戶：Andy123456
Commercially available active noise control headphones rely on fixed analog controllers to drive "anti-noise" loudspeakers. Our design uses an adaptive controller to optimally cancel unwanted acoustic noise. This headphone would be particularly useful for workers who operate or work near heavy machinery and engines because the noise is selectively eliminated. Desired sounds, such as speech and warning signals, are left to be heard clearly. The adaptive control algorithm is implemented on a Texas Instruments (TI™ ) 1 TMS320C30GEL digital signal processor (DSP), which drives a Sony CD550 headphone/microphone system. Our experiments indicate that adaptive noise control results in a dramatic improvement in performance over fixed noise control. This improvement is due to the availability of high-performance Programmable DSPs and the self-optimizing and tracking capabilities of the adaptive controller in response to the surrounding noise.
標簽： Commercially controllers headphones available
上傳時間： 2013-12-04
上傳用戶：dyctj
隨著微電子技術的迅猛發展，集成電路組成的電子系統集成度越來越高，使得芯片 的復雜性不斷上升，單片的成本卻不斷降低。FPGA產品的邏輯單元越來越多，性能越 來越高，單位成本和功耗向越來越低的方向發展，使得可編程片上系統SOPC(System On Programmable Chip)設計成為必然趨勢。SD存儲卡因具備體積小、儲容量高、可擦寫、 價格低以及非易失性等特點被廣泛應用于手機、數碼相機、MP3播放器等領域。 美國Altera公司開發的基于SOPC技術的Nios U嵌入式處理器，是一個可變結構、 通用型的32位RISC嵌入式處理器，設計者可以非常方便地使用SOPC Builder系統開 發工具設計構造以處理器為基礎的系統，針對自己的要求配置Nios II軟核、Avalon總 線及外圍接口系統，體現了面向用戶，面向應用的SOPC技術設計思想。應用與Nios II 相關的集成開發平臺和輔助開發工具，加快了NiosⅡ系統的設計與驗證環節的開發速 度，對于嵌入式系統的產品開發和應用，具有廣泛的價值和積極的意義。 本文介紹了基于Nios II嵌入式處理器的SOPC系統的軟、硬件設計方法，結合實 驗平臺資源特點，構建了基于Nios II軟核處理器的SD
上傳時間： 2015-05-25
上傳用戶：wjc511
The TAS3204 is a highly-integrated audio system-on-chip (SOC) consisting of a fully-Programmable, 48-bit digital audio processor, a 3:1 stereo analog input MUX, four ADCs, four DACs, and other analog functionality. The TAS3204 is Programmable with the graphical PurePath Studio? suite of DSP code development software. PurePath Studio is a highly intuitive, drag-and-drop environment that minimizes software development effort while allowing the end user to utilize the power and flexibility of the TAS3204’s digital audio processing core. TAS3204 processing capability includes speaker equalization and crossover, volume/bass/treble control, signal mixing/MUXing/splitting, delay compensation, dynamic range compression, and many other basic audio functions. Audio functions such as matrix decoding, stereo widening, surround sound virtualization and psychoacoustic bass boost are also available with either third-party or TI royalty-free algorithms. The TAS3204 contains a custom-designed, fully-Programmable 135-MHz, 48-bit digital audio processor. A 76-bit accumulator ensures that the high precision necessary for quality digital audio is maintained during arithmetic operations. Four differential 102 dB DNR ADCs and four differential 105 dB DNR DACs ensure that high quality audio is maintained through the whole signal chain as well as increasing robustness against noise sources such as TDMA interference. The TAS3204 is composed of eight functional blocks: Clocking System Digital Audio Interface Analog Audio Interface Power supply Clocks, digital PLL I2C control interface 8051 MCUcontroller Audio DSP – digital audio processing 特性 Digital Audio Processor Fully Programmable With the Graphical, Drag-and-Drop PurePath Studio? Software Development Environment 135-MHz Operation 48-Bit Data Path With 76-Bit Accumulator Hardware Single-Cycle Multiplier (28 × 48)
上傳時間： 2016-05-06
上傳用戶：fagong
《基于FPGA的嵌入式圖像處理系統設計》詳細介紹了FPGA（Field Programmable Gate Array，現場可編程門陣列）這種新型可編程電子器件的特點，對FPGA的各種編程語言的發展歷程進行了回顧，并針對嵌入式圖像處理系統的特點和應用背景，詳細介紹了如何利用FPGA的硬件并行性特點研制開發高性能嵌入式圖像處理系統。作者還結合自己的經驗，介紹了研制開發基于FPGA的嵌入式圖像處理系統所需要的正確思路以及許多實用性技巧，并給出了許多圖像處理算法在FPGA上的具體實現方法以及多個基于FPGA實現嵌入式圖像處理系統的應用實例。 《基于FPGA的嵌入式圖像處理系統設計》對FPGA技術的初學者以及已經具有比較豐富的設計經驗的讀者來說都有很好的參考價值，也將為從事基于FPGA的嵌入式系統開發和應用的軟硬件工程師和科研人員提供一本比較系統、全面的學習材料。
標簽： fpga
上傳時間： 2018-06-19
上傳用戶：gsl13
AEC-Q100 qualified ? 12 V and 24 V battery systems compliance ? 3.3 V and 5 V logic compatible I/O ? 8-channel configurable MOSFET pre-driver – High-side (N-channel and P-channel MOS) – Low-side (N-channel MOS) – H-bridge (up to 2 H-bridge) – Peak & Hold (2 loads) ? Operating battery supply voltage 3.8 V to 36 V ? Operating VDD supply voltage 4.5 V to 5.5 V ? All device pins, except the ground pins, withstand at least 40 V ? Programmable gate charge/discharge currents for improving EMI behavior
標簽： configurable Automotive pre-driver suitable channel systems MOSFET fully High side
上傳時間： 2019-03-27
上傳用戶：guaixiaolong
New applications such as video conferencing, video on demand, multi- media transcoders, Voice-over-IP (VoIP), intrusion detection, distributed collaboration, and intranet security require advanced functionality from networks beyond simple forwarding congestion control techniques.
標簽： Programmable Networks Active and
上傳時間： 2020-05-26
上傳用戶：shancjb
