·目錄1. Radio Signals on the move 12. Antenna basics 193. Wire, connection, grounds, and all that 494. Marconi and other unbalanced antennas 695. Doublets, dipoles, and other Hertzian antennas 876. Limit
上傳時間： 2013-06-14
上傳用戶：lingduhanya
Abstract: This application note describes the essential workings of an electrocardiogram (ECG). It discussesfactors that disrupt the ECG Signals and make reliable, highly-accurate electrical characterization difficult. Theindustry-standard solution for ECG electrical characterization, which uses an analog front-end and ADCcombination, is explained. The article then introduces the MAX11040 simultaneous-sampling, sigma-deltaADC as a compelling, highly integrated solution that eliminates the need for the AFE, and saves both spaceand cost for the application.
上傳時間： 2013-12-23
上傳用戶：sssl
The MAX4968/MAX4968A are 16-channel, high-linearity,high-voltage, bidirectional SPST analog switches with18I (typ) on-resistance. The devices are ideal for use inapplications requiring high-voltage switching controlledby a low-voltage control signal, such as ultrasound imagingand printers. The MAX4968A provides integrated40kI (typ) bleed resistors on each switch terminal todischarge capacitive loads. Using HVCMOS technology,these switches combine high-voltage bilateral MOSswitches and low-power CMOS logic to provide efficientcontrol of high-voltage analog Signals.
上傳時間： 2013-10-09
上傳用戶：yepeng139
隨著系統設計復雜性和集成度的大規模提高，電子系統設計師們正在從事100MHZ以上的電路設計，總線的工作頻率也已經達到或者超過50MHZ，有一大部分甚至超過100MHZ。目前約80% 的設計的時鐘頻率超過50MHz，將近50% 以上的設計主頻超過120MHz，有20%甚至超過500M。當系統工作在50MHz時，將產生傳輸線效應和信號的完整性問題；而當系統時鐘達到120MHz時，除非使用高速電路設計知識，否則基于傳統方法設計的PCB將無法工作。因此，高速電路信號質量仿真已經成為電子系統設計師必須采取的設計手段。只有通過高速電路仿真和先進的物理設計軟件，才能實現設計過程的可控性。傳輸線效應基于上述定義的傳輸線模型，歸納起來，傳輸線會對整個電路設計帶來以下效應。 · 反射信號Reflected Signals · 延時和時序錯誤Delay & Timing errors · 過沖(上沖/下沖)Overshoot/Undershoot · 串擾Induced Noise (or crosstalk) · 電磁輻射EMI radiation
上傳時間： 2013-11-16
上傳用戶：lx9076
Abstract: Rail splitting is creating an artificial virtual ground as a reference voltage. It is used to set the signalto match the op amp's "sweet spot." An op amp has the most linear- and distortion-free qualities at that sweetspot. Typically, the sweet spot occurs near the center between the single power rail and ground. In the case ofa number of Signals, the virtual ground can control channel DC errors when multiplexing or switching theSignals.
上傳時間： 2013-10-23
上傳用戶：wushengwu
Linear Technology offers a variety of devices that simplifyconverting power from a USB cable, but the LTC®3455represents the highest level of functional integration yet. The LTC3455 seamlessly manages power flowbetween an AC adapter, USB cable and Li-ion battery,while complying with USB power standards, all from a4mm × 4mm QFN package. In addtion, two high efficiencysynchronous buck converters generate low voltage railswhich most USB-powered peripherals require. TheLTC3455 also provides power-on reset Signals for themicroprocessor, a Hot SwapTM output for poweringmemory cards as well as an uncommitted gain blocksuitable for use as a low-battery comparator or an LDOcontroller. The PCB real estate required for the entire USBpower control circuit and two DC/DC converters is only225mm2.
上傳時間： 2013-11-02
上傳用戶：名爵少年
A frequent requirement in systems involves drivinganalog Signals into non-linear or reactive loads. Cables,transformers, actuators, motors and sample-hold circuitsare examples where the ability to drive diffi cult loads isrequired. Although several power buffer amplifi ers areavailable, none have been optimized for driving diffi cultloads.
上傳時間： 2014-12-24
上傳用戶：1109003457
Abstract: As electronic systems take over many of the mechanical functions in a car—ranging from engine timing to steering andbraking—there is a growing concern about fault tolerance. There should not be a single point of failure that would prevent a car fromat least "limping" off the road or making it to the nearest service station. Redundant systems, watchdog timers, and other controlcircuits are used to reroute Signals and perform other functions that ensure that a vehicle can safely make it off the road when afailure occurs.
上傳時間： 2013-11-10
上傳用戶：diets
Demonstration circuit 1562A is an engineering toolto design and evaluate the LTC699X-X family ofTimerBlox circuits. The center section of the boardcontains a pre-configured TimerBlox function.DC1562A comes in twelve timing function variationsas outlined in Table 1.Surrounding the center board is a ”playground”prototyping area. The prototyping area has padsfor Dip-8, S8, MS8, or S6 packages with breadboarding connections to each pin and two convenientpower buses and ground bus surrounding theentire area. This area is for conditioning Signals tocontrol the timer function and for adding loads controlled in time.
上傳時間： 2013-10-18
上傳用戶：如果你也聽說
The MAX9257/MAX9258 programmable serializer/deserializer (SerDes) devices transfer both video data and control Signals over the same twisted-pair cable. However, control data can only be transmitted during the vertical blank time, which is indicated by the control-channel-enabled output (CCEN) signal. The electronic control unit (ECU) firmware designer needs to know how quickly to respond to the CCEN signal before it times out and how to calculate this duration. This application note describes how to calculate the duration of the CCEN for the MAX9257/MAX9258 SerDes chipset. The calculation is based on STO timeout, clock frequency, and UART bit timing. The CCEN duration is programmable and can be closed if not in use.
上傳時間： 2014-01-24
上傳用戶：xingisme
