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  • XL6003 300KHz 36V Boost 3W LED

    The XL6003 regulator is fixed frequency PWM Boost (step-up) DC/DC converter, capable ofdriving 1050mA load current with excellent line and load regulation. The regulator is simple to use because it includes internal frequency compensation and a fixed-frequency oscillator so that it requires a minimum number of external components to work. The XL6003 could directly drive 5~10 3W LED units at VIN=12V.

    標(biāo)簽: Boost 6003 300 36V

    上傳時(shí)間: 2013-11-07

    上傳用戶:xy@1314

  • 支持USB PS2 UART SPI CRC功能的凌陽8位單

    1、 支持USB 1.1通訊協(xié)議;2、 支持高速(Full Speed、12Mbps )和低速(Low Speed、1.5Mbps )傳輸;3、 6MHz晶體,鎖相環(huán)PLL振蕩器提供高速、低速所需時(shí)鐘源;4、 支持3個(gè)端口(endpoint),可獨(dú)立編程為IN 或 OUT端口。5、 PS/2:支持PS/2協(xié)議(eg.鼠標(biāo)),與USB復(fù)用。

    標(biāo)簽: UART USB PS2 CRC

    上傳時(shí)間: 2013-11-03

    上傳用戶:hbsunhui

  • PAM2862 1A LED Driver with Int

    The PAM2862 is a continuous mode inductivestep-down converter, designed for driving singleor multiple series connected LEDs efficientlyfrom a voltage source higher than the LEDvoltage. The device operates from an inputupply between 6V and 30V and provides anexternally adjustable output current of up to 1A.Depending upon supply voltage and externalcomponents, this can provide up to 24 watts ofoutput power.

    標(biāo)簽: Driver 2862 with PAM

    上傳時(shí)間: 2013-11-16

    上傳用戶:司令部正軍級(jí)

  • PCA9541 2 to 1 I2C-bus master

    The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.

    標(biāo)簽: master C-bus 9541 PCA

    上傳時(shí)間: 2013-10-09

    上傳用戶:3294322651

  • PCA9549 Octal bus switch with

    The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlledby the I2C-bus. The low ON-state resistance of the switch allows connections to be madewith minimal propagation delay. Any individual A to B channel or combination of channelscan be selected via the I2C-bus, determined by the contents of the programmable Controlregister. When the I2C-bus bit is HIGH (logic 1), the switch is on and data can flow fromPort A to Port B, or vice versa. When the I2C-bus bit is LOW (logic 0), the switch is open,creating a high-impedance state between the two ports, which stops the data flow.An active LOW reset input (RESET) allows the PCA9549 to recover from a situationwhere the I2C-bus is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-busstate machine and causes all the bits to be open, as does the internal power-on resetfunction.

    標(biāo)簽: switch Octal 9549 with

    上傳時(shí)間: 2014-11-22

    上傳用戶:xcy122677

  • PCA9547 8 channel I2C bus mult

    The PCA9547 is an octal bidirectional translating multiplexer controlled by the I2C-bus.The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Only oneSCx/SDx channel can be selected at a time, determined by the contents of theprogrammable control register. The device powers up with Channel 0 connected, allowingimmediate communication between the master and downstream devices on that channel.

    標(biāo)簽: channel 9547 mult PCA

    上傳時(shí)間: 2014-12-28

    上傳用戶:270189020

  • Replacement of NXP PCA9518 wit

    The outputs of the PCA9518 are immediately available as soon as there is a voltage present on thesupply >~1V and behave as described above. The power-on reset of the PCA9518A keeps the outputsturned off during power-up and maintains the high impedance of the outputs throughout the power-upcycle. There is an additional built-in delay after power-up that allows the analog circuits to stabilize beforethe part is activated.

    標(biāo)簽: Replacement 9518 NXP PCA

    上傳時(shí)間: 2013-10-26

    上傳用戶:13817753084

  • Adding 32 KB of Serial SRAM to

    Although Stellaris microcontrollers have generous internal SRAM capabilities, certain applicationsmay have data storage requirements that exceed the 8 KB limit of the Stellaris LM3S8xx seriesdevices. Since microcontrollers do not have an external parallel data-bus, serial memory optionsmust be considered. Until recently, the ubiquitous serial EEPROM/flash device was the only serialmemory solution. The major limitations of EEPROM and flash technology are slow write speed, slowerase times, and limited write/erase endurance.Recently, serial SRAM devices have become available as a solution for high-speed dataapplications. The N256S08xxHDA series of devices, from AMI Semiconductor, offer 32 K x 8 bits oflow-power data storage, a fast Serial Peripheral Interface (SPI) serial bus, and unlimited write cycles.The parts are available in 8-pin SOIC and compact TSSOP packages.

    標(biāo)簽: Adding Serial SRAM 32

    上傳時(shí)間: 2013-10-14

    上傳用戶:cxl274287265

  • 3-V TO 5.5-V MULTICHANNEL RS-2

    The MAX3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)protection on serial-port connection pins. The device meets the requirements of TIA/EIA-232-F and provides theelectrical interface between an asynchronous communication controller and the serial-port connector. Thiscombination of drivers and receivers matches that needed for the typical serial port used in an IBM PC/AT, orcompatible. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-Vsupply. In addition, the device includes an always-active noninverting output (ROUT2B), which allowsapplications using the ring indicator to transmit data while the device is powered down. The device operates atdata signaling rates up to 250 kbit/s and a maximum of 30-V/ms driver output slew rate.

    標(biāo)簽: MULTICHANNEL 5.5 TO RS

    上傳時(shí)間: 2013-10-19

    上傳用戶:ddddddd

  • DUAL DIGITAL ISOLATORS

    The ISO7220 and ISO7221 are dual-channel digital isolators. To facilitate PCB layout, the channels are orientedin the same direction in the ISO7220 and in opposite directions in the ISO7221. These devices have a logic inputand output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to4000 V. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, andprevent noise currents on a data bus or other circuits from entering the local ground and interfering with ordamaging sensitive circuitry.

    標(biāo)簽: ISOLATORS DIGITAL DUAL

    上傳時(shí)間: 2013-10-24

    上傳用戶:hbsunhui

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