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System-Level

  • This brief introduce a kind of the framework construction to materialize the system. And an example

    This brief introduce a kind of the framework construction to materialize the system. And an example was given with the discussion on the performence.

    標(biāo)簽: construction materialize introduce framework

    上傳時間: 2013-08-17

    上傳用戶:ysystc699

  • Building a RISC System in an FPGA

    Building a RISC System in an FPGA

    標(biāo)簽: Building System RISC FPGA

    上傳時間: 2013-09-04

    上傳用戶:朗朗乾坤

  • EDA系統(tǒng)軟件ispDesignExpert System 環(huán)境下進(jìn)行數(shù)字系統(tǒng)設(shè)計(jì)

    本設(shè)計(jì)的基本要求是以復(fù)雜可編程邏輯器件CPLD為基礎(chǔ),通過在EDA系統(tǒng)軟件ispDesignExpert System 環(huán)境下進(jìn)行數(shù)字系統(tǒng)設(shè)計(jì),熟練掌握該環(huán)境下的功能仿真,時間仿真,管腳鎖定和芯片下載。 本系統(tǒng)基本上比較全面的模擬了計(jì)數(shù)式數(shù)字頻率計(jì),廣泛應(yīng)用于工業(yè)、民用等各個領(lǐng)域,具有一定的開發(fā)價(jià)值。

    標(biāo)簽: ispDesignExpert System EDA 系統(tǒng)軟件

    上傳時間: 2013-09-05

    上傳用戶:文993

  • System will automatically delete the directory

    System will automatically delete the directory

    標(biāo)簽: automatically directory System delete

    上傳時間: 2013-09-09

    上傳用戶:toyoad

  • VHDL,Verilog,System verilog比較

      本文簡單討論并總結(jié)了VHDL、Verilog,System verilog 這三中語言的各自特點(diǎn)和區(qū)別As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers and organizationsare contemplating whether they shouldswitch from one HDL to another.

    標(biāo)簽: Verilog verilog System VHDL

    上傳時間: 2013-10-16

    上傳用戶:牛布牛

  • 電臺維修模擬訓(xùn)練系統(tǒng)設(shè)計(jì)方法研究

    Methods for designing a maintenance simulation training system for certain kind of radio are introduced. Fault modeling method is used to establish the fault database. The system sets up some typical failures, follow the prompts trainers can locate the fault source and confirm the type to accomplish corresponding fault maintenance training. A training evaluation means is given to examining and evaluating the training performance. The system intuitively and vividly shows the fault maintenance process, it can not only be used in teaching, but also in daily maintenance training to efficiently improve the maintenance operation level. Graphical programming language LabVIEW is used to develop the system platform.

    標(biāo)簽: 電臺維修 模擬訓(xùn)練 方法研究 系統(tǒng)設(shè)計(jì)

    上傳時間: 2013-11-19

    上傳用戶:3294322651

  • High-Speed Digital System Design

    Introduce High-Speed Digital System Design.

    標(biāo)簽: High-Speed Digital Design System

    上傳時間: 2013-10-20

    上傳用戶:gps6888

  • 基于CORDIC算法的高速ODDFS電路設(shè)計(jì)

    為了滿足現(xiàn)代高速通信中頻率快速轉(zhuǎn)換的需求,基于坐標(biāo)旋轉(zhuǎn)數(shù)字計(jì)算(CORDIC,Coordinate Rotation Digital Computer)算法完成正交直接數(shù)字頻率合成(ODDFS,Orthogonal Direct Digital Frequency Synthesizer)電路設(shè)計(jì)方案。采用MATLAB和Xilinx System Generator開發(fā)工具搭建電路的系統(tǒng)模型,通過現(xiàn)場可編程門陣列(FPGA,F(xiàn)ield Programmable Gate Array)完成電路的寄存器傳輸級(RTL,Register Transfer Level)驗(yàn)證,仿真結(jié)果表明電路設(shè)計(jì)具有很高的有效性和可行性。

    標(biāo)簽: CORDIC ODDFS 算法 電路設(shè)計(jì)

    上傳時間: 2013-11-09

    上傳用戶:hfnishi

  • 基于System Generator的數(shù)字下變頻設(shè)計(jì)

    Xilinx公司推出的DSP設(shè)計(jì)開發(fā)工具System Generator是在Matlab環(huán)境中進(jìn)行建模,是DSP高層系統(tǒng)設(shè)計(jì)與Xilinx FPGA之間實(shí)現(xiàn)的“橋梁”。在分析了FPGA傳統(tǒng)級設(shè)計(jì)方法的基礎(chǔ)上,提出了基于System Generator的系統(tǒng)級設(shè)計(jì)新方法,并應(yīng)用新方法設(shè)計(jì)驗(yàn)證了一套數(shù)字下變頻系統(tǒng),通過仿真和實(shí)驗(yàn)結(jié)果驗(yàn)證了該方法的有效性和準(zhǔn)確性。

    標(biāo)簽: Generator System 數(shù)字 變頻設(shè)計(jì)

    上傳時間: 2013-11-18

    上傳用戶:小草123

  • 高速數(shù)字系統(tǒng)設(shè)計(jì)下載pdf

    高速數(shù)字系統(tǒng)設(shè)計(jì)下載pdf:High-Speed Digital SystemDesign—A Handbook ofInterconnect Theory and DesignPracticesStephen H. HallGarrett W. HallJames A. McCallA Wiley-Interscience Publication JOHN WILEY & SONS, INC.New York • Chichester • Weinheim • Brisbane • Singapore • TorontoCopyright © 2000 by John Wiley & Sons, Inc.speeddigital systems at the platform level. The book walks the reader through everyrequired concept, from basic transmission line theory to digital timing analysis, high-speedmeasurement techniques, as well as many other topics. In doing so, a unique balancebetween theory and practical applications is achieved that will allow the reader not only tounderstand the nature of the problem, but also provide practical guidance to the solution.The level of theoretical understanding is such that the reader will be equipped to see beyondthe immediate practical application and solve problems not contained within these pages.Much of the information in this book has not been needed in past digital designs but isabsolutely necessary today. Most of the information covered here is not covered in standardcollege curricula, at least not in its focus on digital design, which is arguably one of the mostsignificant industries in electrical engineering.The focus of this book is on the design of robust high-volume, high-speed digital productssuch as computer systems, with particular attention paid to computer busses. However, thetheory presented is applicable to any high-speed digital system. All of the techniquescovered in this book have been applied in industry to actual digital products that have beensuccessfully produced and sold in high volume.Practicing engineers and graduate and undergraduate students who have completed basicelectromagnetic or microwave design classes are equipped to fully comprehend the theorypresented in this book. At a practical level, however, basic circuit theory is all thebackground required to apply the formulas in this book.

    標(biāo)簽: 高速數(shù)字 系統(tǒng)設(shè)計(jì)

    上傳時間: 2013-10-26

    上傳用戶:縹緲

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