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The PCA9548A is an octal bidirectional translating switch controlled via the I2C-bus. TheSCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.An active LOW reset input allows the PCA9548A to recover from a situation where one ofthe downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets theI2C-bus state machine and causes all the channels to be deselected as does the internalPower-on reset function.
標簽：
channel
9548A
9548
PCA
上傳時間：
2013-10-13
上傳用戶：bakdesec
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The MAX3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)protection on serial-port connection pins. The device meets the requirements of TIA/EIA-232-F and provides theelectrical interface between an asynchronous communication controller and the serial-port connector. Thiscombination of drivers and receivers matches that needed for the typical serial port used in an IBM PC/AT, orcompatible. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-Vsupply. In addition, the device includes an always-active noninverting output (ROUT2B), which allowsapplications using the ring indicator to transmit data while the device is powered down. The device operates atdata signaling rates up to 250 kbit/s and a maximum of 30-V/ms driver output slew rate.
標簽：
MULTICHANNEL
5.5
TO
RS
上傳時間：
2013-10-19
上傳用戶：ddddddd
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The ISO7220 and ISO7221 are dual-channel digital isolators. To facilitate PCB layout, the channels are orientedin the same direction in the ISO7220 and in opposite directions in the ISO7221. These devices have a logic inputand output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to4000 V. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, andprevent noise currents on a data bus or other circuits from entering the local ground and interfering with ordamaging sensitive circuitry.
標簽：
ISOLATORS
DIGITAL
DUAL
上傳時間：
2013-10-24
上傳用戶：hbsunhui
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SPMC75F2413A在三相交流感應電機的開環V/F控制的應用:系統輸入電源電壓為AC110V/AC220V，經全波整流后供系統使用。系統使用Sunplus公司的SPMC75F2413A產生AC三相異步電機的VVVF控制所需的SPWM信號,并完成系統控制。使用三菱公司的智能功率模塊PS21865實現電機的功率驅動。在AC220V輸入時，系統最大能驅動1.5KW的負載。系統的變頻區間為2Hz~200Hz。
標簽：
2413A
F2413
SPMC
2413
上傳時間：
2013-11-06
上傳用戶：924484786
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The C500 microcontroller family usually provides only one on-chip synchronous serialchannel (SSC). If a second SSC is required, an emulation of the missing interface mayhelp to avoid an external hardware solution with additional electronic components.The solution presented in this paper and in the attached source files emulates the mostimportant SSC functions by using optimized SW routines with a performance up to 25KBaud in Slave Mode with half duplex transmission and an overhead less than 60% atSAB C513 with 12 MHz. Due to the implementation in C this performance is not the limitof the chip. A pure implementation in assembler will result in a strong reduction of theCPU load and therefore increase the maximum speed of the interface. In addition,microcontrollers like the SAB C505 will speed up the interface by a factor of two becauseof an optimized architecture compared with the SAB C513.Moreover, this solution lays stress on using as few on-chip hardware resources aspossible. A more excessive consumption of those resources will result in a highermaximum speed of the emulated interface.Due to the restricted performance of an 8 bit microcontroller a pin compatible solution isprovided only; the internal register based programming interface is replaced by a set ofsubroutine calls.The attached source files also contain a test shell, which demonstrates how to exchangeinformation between an on-chip HW-SSC and the emulated SW-SSC via 5 external wiresin different operation modes. It is based on the SAB C513 (Siemens 8 bit microcontroller).A table with load measurements is presented to give an indication for the fraction of CPUperformance required by software for emulating the SSC.
標簽：
synchronous
Emulating
serial
上傳時間：
2014-01-31
上傳用戶：z1191176801
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All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
標簽：
Signal
Input
Fall
Rise
上傳時間：
2013-10-23
上傳用戶：copu
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All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.
標簽：
C16x
微控制器
輸入信號
時序圖
上傳時間：
2014-04-02
上傳用戶：han_zh
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The 87C576 includes two separate methods of programming theEPROM array, the traditional modified Quick-Pulse method, and anew On-Board Programming technique (OBP).Quick Pulse programming is a method using a number of devicepins in parallel (see Figure 1) and is the traditional way in which87C51 family members have been programmed. The Quick-Pulsemethod supports the following programming functions:– program USER EPROM– verify USER EPROM– program KEY EPROM– program security bits– verify security bits– read signature bytesThe Quick-Pulse method is quite easily suited to standardprogramming equipment as evidenced by the numerous vendors of87C51 compatible programmers on the market today. Onedisadvantage is that this method is not well suited to programming inthe embedded application because of the large number of signallines that must be isolated from the application. In addition, parallelsignals from a programmer would need to be cabled to theapplication’s circuit board, or the application circuit board wouldneed to have logic built-in to perform the programming functions.These requirements have generally made in-circuit programmingusing the modified Quick Pulse method impractical in almost all87C51 family applications.
標簽：
87C576
微控制器
編程
上傳時間：
2013-10-21
上傳用戶：xiaozhiqban
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當拿到一張CASE單時，首先得確定的是能用什么母體才能實現此功能，然后才能展開對外圍硬件電路的設計，因此首先得了解每個母體的基本功能及特點，下面大至的介紹一下本公司常用的IC：單芯片解決方案• SN8P1900 系列– 高精度 16-Bit 模數轉換器– 可編程運算放大器 (PGIA)• 信號放大低漂移: 2V• 放大倍數可編程: 1/16/64/128 倍– 升壓- 穩壓調節器 (Charge-Pump Regulator)• 電源輸入: 2.4V ~ 5V• 穩壓輸出: e.g. 3.8V at SN8P1909– 內置液晶驅動電路 (LCD Driver)– 單芯片解決方案 • 耳溫槍 SN8P1909 LQFP 80 Pins• 5000 解析度量測器 SN8P1908 LQFP 64 Pins• 體重計 SN8P1907 SSOP 48 Pins單芯片解決方案• SN8P1820 系列– 精確的12-Bit 模數轉換器– 可編程運算放大器 (PGIA)• Gain Stage One: Low Offset 5V, Gain: 16/32/64/128• Gain Stage One: Low Offset 2mV, Gain: 1.3 ~ 2.5– 升壓- 穩壓調節器• 電源輸入: 2.4V ~ 5V• 穩壓輸出: e.g. 3.8V at SN8P1829– 內置可編程運算放大電路– 內置液晶驅動電路 – 單芯片解決方案 • 電子醫療器 SN8P1829 LQFP 80 Pins
高速/低功耗/高可靠性微控制器• 最新SN8P2000 系列– SN8P2500/2600/2700 系列– 高度抗交流雜訊能力• 標準瞬間電壓脈沖群測試 (EFT): IEC 1000-4-4• 雜訊直接灌入芯片電源輸入端• 只需添加1顆 2.2F/50V 旁路電容• 測試指標穩超 4000V (歐規)– 高可靠性復位電路保證系統正常運行• 支持外部復位和內部上電復位• 內置1.8V 低電壓偵測可靠復位電路• 內置看門狗計時器保證程序跳飛可靠復位– 高抗靜電/栓鎖效應能力– 芯片工作溫度有所提高: -200C ~ 700C 工規芯片溫度： -400C ~ 850C
高速/低功耗/高可靠性微控制器• 最新 SN8P2000 系列– SN8P2500/2600/2700 系列– 1T 精簡指令級結構• 1T: 一個外部振蕩周期執行一條指令• 工作速度可達16 MIPS / 16 MHz Crystal– 工作消耗電流 < 2mA at 1-MIPS/5V– 睡眠模式下消耗電流 < 1A / 5V額外功能• 高速脈寬調制輸出 (PWM)– 8-Bit PWM up to 23 KHz at 12 MHz System Clock– 6-Bit PWM up to 93 KHz at 12 MHz System Clock– 4-Bit PWM up to 375 KHz at 12 MHz System Clock• 內置高速16 MHz RC振蕩器 (SN8P2501A)• 電壓變化喚醒功能• 可編程控制沿觸發/中斷功能– 上升沿 / 下降沿 / 雙沿觸發• 串行編程接口
標簽：
單片機
線路設計
上傳時間：
2013-10-21
上傳用戶：jiahao131
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SF-CY3 FPGA套件開發指南Ver6.00 （by特權同學）
標簽：
SF-CY
FPGA
6.00
Ver
上傳時間：
2013-10-22
上傳用戶：songnanhua
