目前,大型設計一般推薦使用同步時序電路。同步時序電路基于時鐘觸發沿設計,對時鐘的周期、占空比、延時和抖動提出了更高的要求。為了滿足同步時序設計的要求,一般在FPGA設計中采用全局時鐘資源驅動設計的主時鐘,以達到最低的時鐘抖動和延遲。 FPGA全局時鐘資源一般使用全銅層工藝實現,并設計了專用時鐘緩沖與驅動結構,從而使全局時鐘到達芯片內部的所有可配置單元(CLB)、I/O單元 (IOB)和選擇性塊RAM(Block Select RAM)的時延和抖動都為最小。為了適應復雜設計的需要,Xilinx的FPGA中集成的專用時鐘資源與數字延遲鎖相環(DLL)的數目不斷增加,最新的 Virtex II器件最多可以提供16個全局時鐘輸入端口和8個數字時鐘管理模塊(DCM)。與全局時鐘資源相關的原語常用的與全局時鐘資源相關的Xilinx器件原語包括:IBUFG、IBUFGDS、BUFG、BUFGP、BUFGCE、 BUFGMUX、BUFGDLL和DCM等,如圖1所示。
上傳時間: 2013-11-20
上傳用戶:563686540
ZBT SRAM控制器參考設計,xilinx提供VHDL代碼 Description: Contains the following files readme.txt appnote_zbtp.vhd appnote_zbtf.vhd appnote_zbt.ucf Platform: All Installation/Use: Use 'unzip' on the .zip file and 'gunzip' followed by 'tar -xvf' on the .tar.gz file.
上傳時間: 2013-10-25
上傳用戶:peterli123456
USB接口控制器參考設計,xilinx提供VHDL代碼 usb xilinx vhdl ; This program is free software; you can redistribute it and/or modify ; it under the terms of the GNU General Public License as published by ; the Free Software Foundation; either version 2 of the License, or ; (at your option) any later version. ; ; This program is distributed in the hope that it will be useful, ; but WITHOUT ANY WARRANTY; without even the implied warranty of ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ; GNU General Public License for more details. ; ; You should have received a copy of the GNU General Public License ; along with this program; if not, write to the Free Software ; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
上傳時間: 2013-10-29
上傳用戶:zhouchang199
UART 4 UART參考設計,Xilinx提供VHDL代碼 uart_vhdl This zip file contains the following folders: \vhdl_source -- Source VHDL files: uart.vhd - top level file txmit.vhd - transmit portion of uart rcvr.vhd - - receive portion of uart \vhdl_testfixture -- VHDL Testbench files. This files only include the testbench behavior, they do not instantiate the DUT. This can easily be done in a top-level VHDL file or a schematic. This folder contains the following files: txmit_tb.vhd -- Test bench for txmit.vhd. rcvr_tf.vhd -- Test bench for rcvr.vhd.
上傳時間: 2013-11-02
上傳用戶:18862121743
用Xilinx CPLD作為電機控制器
上傳時間: 2013-10-16
上傳用戶:macarco
The revolution of automation on factory floors is a key driver for the seemingly insatiable demand for higher productivity, lower total cost of ownership,and high safety. As a result, industrial applications drive an insatiable demand of higher data bandwidth and higher system-level performance. This white paper describes the trends and challenges seen by designers and how FPGAs enable solutions to meet their stringent design goals.
上傳時間: 2013-11-08
上傳用戶:yan2267246
xilinx設計可以快速適應各種發展標準和處理要求,從而可以改進分析能力來滿足市場需求,同時可以在最初部署后的很長一段時間內添加各種特性和功能。 Xilinx All Programmable FPGA 和基于 SoC 的解決方案和平臺可充分滿足當今磁場定向控制 (FOC) 等復雜控制算法所提出的苛刻的時序和性能要求。 Xilinx 工業成像解決方案實現了快速原型開發,簡化了開發工作,極大地縮短了高分辨率視頻會議、視頻監控和機器視覺系統的面市時間。
上傳時間: 2013-11-17
上傳用戶:jhs541019
Xilinx Sdram控制器VHDL源代碼
上傳時間: 2014-01-14
上傳用戶:gdgzhym
51的VERILOG代碼!適用于Xilinx的FPGA
上傳時間: 2015-02-04
上傳用戶:lijianyu172
xilinx virtex architecture
標簽: architecture xilinx virtex
上傳時間: 2015-02-06
上傳用戶:6546544