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analog circuits

  • TLC1549串口傳輸與單片機(jī)的AD設(shè)計(jì)

    詳細(xì)介紹了TLC1549系列模數(shù)轉(zhuǎn)換器的特點(diǎn)及工作原理,然后根據(jù)TLC1549的工作時(shí)序和A/D轉(zhuǎn)換原理針對實(shí)際問題編寫了詳細(xì)的匯編語言程序。 Abstract:  A basic principle and characteristic of TLC1549 analog-to-digital converter are introduced? detailedly in this article.Through engineering-oriented illustration,a microcomputer programmer base on basic principle and time sequence of TLC1549 is writted.

    標(biāo)簽: 1549 TLC 串口 傳輸

    上傳時(shí)間: 2014-07-16

    上傳用戶:blans

  • SN65LBC170,SN75LBC170,pdf(TRIP

    The SN65LBC170 and SN75LBC170 aremonolithic integrated circuits designed forbidirectional data communication on multipointbus-transmission lines. Potential applicationsinclude serial or parallel data transmission, cabledperipheral buses with twin axial, ribbon, ortwisted-pair cabling. These devices are suitablefor FAST-20 SCSI and can transmit or receivedata pulses as short as 25 ns, with skew lessthan 3 ns.These devices combine three 3-state differentialline drivers and three differential input linereceivers, all of which operate from a single 5-Vpower supply.The driver differential outputs and the receiverdifferential inputs are connected internally to formthree differential input/output (I/O) bus ports thatare designed to offer minimum loading to the buswhenever the driver is disabled or VCC = 0. Theseports feature a wide common-mode voltage rangemaking the device suitable for party-lineapplications over long cable runs.

    標(biāo)簽: 170 LBC SN TRIP

    上傳時(shí)間: 2013-10-13

    上傳用戶:ytulpx

  • 利用MCP3905/6進(jìn)行符合IEC標(biāo)準(zhǔn)的有功電能表設(shè)計(jì),A

    MCP3905/6 電能表集成電路(Intergrated Circuits,IC)為單相家用電表設(shè)計(jì)提供有功功率測量。這些器件包含符合國際電工委員會(huì)(International Electrotechnical Commission,IEC)所要求的特性,如空載門限和啟動(dòng)電流。此外, MCP3905/6 電表參考設(shè)計(jì)還給出了根據(jù)IEC標(biāo)準(zhǔn)的要求通過EMC抗干擾的系統(tǒng)級設(shè)計(jì)的例子。 本應(yīng)用筆記中使用的電表參考設(shè)計(jì)演示板進(jìn)行了IEC 認(rèn)證要求的EMC 測試。這些測試由第三方進(jìn)行,測試結(jié)果見本應(yīng)用筆記的末尾。

    標(biāo)簽: 3905 MCP IEC 標(biāo)準(zhǔn)

    上傳時(shí)間: 2013-10-17

    上傳用戶:ysjing

  • ADC Oversampling Techniques fo

    Luminary Micro provides an analog-to-digital converter (ADC) module on some members of theStellaris microcontroller family. The hardware resolution of the ADC is 10 bits; however, due to noiseand other accuracy-diminishing factors, the true accuracy is less than 10 bits. This application noteprovides a software-based oversampling technique, resulting in an improved Effective Number OfBits (ENOB) in the conversion result. This document describes methods of oversampling an inputsignal, and the impact on precision and overall system performance.

    標(biāo)簽: Oversampling Techniques ADC fo

    上傳時(shí)間: 2013-12-17

    上傳用戶:zhyiroy

  • Using the Stellaris Microcontr

    Luminary Micro Stellaris™ microcontrollers that are equipped with an analog-to-digital converter(ADC), use an innovative sequence-based sampling architecture designed to be extremely flexible,yet easy to use. This application note describes the sampling architecture of the ADC. Sinceprogrammers can configure Stellaris microcontrollers either through the powerful StellarisFamilyDriver Library or through direct writes to the device's control registers, this application note describesboth methods. The information presented in this document is intended to complement the ADCchapter of the device datasheet, and assumes the reader has a basic understanding of howADCsfunction.

    標(biāo)簽: Microcontr Stellaris Using the

    上傳時(shí)間: 2013-10-14

    上傳用戶:blans

  • DUAL DIGITAL ISOLATORS

    The ISO7220 and ISO7221 are dual-channel digital isolators. To facilitate PCB layout, the channels are orientedin the same direction in the ISO7220 and in opposite directions in the ISO7221. These devices have a logic inputand output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to4000 V. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, andprevent noise currents on a data bus or other circuits from entering the local ground and interfering with ordamaging sensitive circuitry.

    標(biāo)簽: ISOLATORS DIGITAL DUAL

    上傳時(shí)間: 2013-10-24

    上傳用戶:hbsunhui

  • 基于單DSP的VoIP模擬電話適配器研究與實(shí)現(xiàn)

    基于單DSP的VoIP模擬電話適配器研究與實(shí)現(xiàn):提出和實(shí)現(xiàn)了一種新穎的基于單個(gè)通用數(shù)字信號處理器(DSP)的VoIP模擬電話適配器方案。DSP的I/O和存儲資源非常有限,通常適于運(yùn)算密集型應(yīng)用,不適宜控制密集型應(yīng)用[5]。該系統(tǒng)高效利用單DSP的I/O和片內(nèi)外存儲器資源,采用μC/OS-II嵌入式實(shí)時(shí)操作系統(tǒng),支持SIP和TCP-UDP/IP協(xié)議,通過LAN或者寬帶接入,使普通電話機(jī)成為Internet終端,實(shí)現(xiàn)IP電話。該系統(tǒng)軟硬件結(jié)構(gòu)緊湊高效,運(yùn)行穩(wěn)定,成本低,具有廣闊的應(yīng)用前景。關(guān)鍵詞:模擬電話適配器;IP電話;數(shù)字信號處理器;μC/OS-II 【Abstract】This paper presents a VoIP ATA solution based on a single digital signal processor (DSP). DSPs are suitable for arithmetic-intensiveapplication and unsuitable for control-intensive application because of the limitation of I/O and memory resources. This solution is based on a 16-bitfixed-point DSP and μC/OS-II embedded real-time operating system. It makes good use of the limited resources, supports SIP and TCP-UDP/IPprotocol. It can connect the analog telephone to Internet and realize the VoIP application. This system has a great future for its high efficiency andlow cost.【Key words】Analog telephone adapter (ATA); Voice over Internet protocol (VoIP); Digital signal processor (DSP); μC/OS-II Research and Implementation of VoIPATA Based on Single DSP

    標(biāo)簽: VoIP DSP 模擬電話 適配器

    上傳時(shí)間: 2013-11-20

    上傳用戶:Wwill

  • 水位監(jiān)測報(bào)警系統(tǒng)原理

    摘要:本水位監(jiān)測報(bào)警器使用5V低壓直流電源(也可以用3節(jié)5號電池代替)就可以對5~15厘米的水位進(jìn)行監(jiān)測,用LED顯示和數(shù)碼管顯示水位,并可以對不再此范圍內(nèi)的水位發(fā)出報(bào)警。主要采用CD4066、74LS86、74LS32、CD4511芯片,再加上數(shù)碼管、蜂鳴器、發(fā)光二極管、電阻這些器件組成一個(gè)簡單而靈敏的監(jiān)測報(bào)警電路,操作簡單,接通電源即可工作。因?yàn)榇蟛糠蛛娐凡捎脭?shù)字電路,所以本水位監(jiān)測報(bào)警器還具有耗能低、準(zhǔn)確性高的特點(diǎn)。關(guān)鍵字:譯碼電路    報(bào)警電路    監(jiān)測電路 Abstract: The water level alarm monitoring the use of 5 V low-voltage DC power (can also use three batteries replaced on the 5th) will be able to 5 to 15 centimeters of water level monitoring, with LED display and digital display of water level, and this can no longer Within the scope of a water level alarm. Mainly CD4066, 74LS86, 74LS32, CD4511 chips, coupled with digital control, buzzer, light-emitting diode, the resistance of these devices composed of a simple and sensitive monitoring alarm circuits. Because the majority of circuits using digital circuitry, so the water level monitored alarm system also has low energy consumption, high accuracy of the characteristics. Keyword: Decoding circuit alarm circuit monitoring circuit

    標(biāo)簽: 水位 監(jiān)測報(bào)警 系統(tǒng)原理

    上傳時(shí)間: 2013-11-05

    上傳用戶:王慶才

  • Reading and Writing iButtons v

    Abstract: This application note explains the hardware of different types of 1-Wire® interfaces and software examples adapted to this hardware with a focus on serial ports. Depending on the types of iButtons required for a project and the type of computer to be used, the most economical interface is easily found. The hardware examples shown are basically two different types: 5V general interface and 12V RS-232 interface. Within the 5V group a common printed circuit board could be used for all circuits described. The variations can be achieved by different populations of components. The same principal is used for the 12V RS-232 interface. The population determines if it is a Read all or a Read/Write all type of interface. There are other possible circuit implementations to create a 1-Wire interface. The circuits described in this application note cover many different configurations. For a custom application, one of the described options can be adapted to meet individual needs.

    標(biāo)簽: iButtons Reading Writing and

    上傳時(shí)間: 2013-10-29

    上傳用戶:long14578

  • 3.3v看門狗芯片

    The STWD100 watchdog timer circuits are self-contained devices which prevent systemfailures that are caused by certain types of hardware errors (non-responding peripherals,bus contention, etc.) or software errors (bad code jump, code stuck in loop, etc.).The STWD100 watchdog timer has an input, WDI, and an output, WDO (see Figure 2). Theinput is used to clear the internal watchdog timer periodically within the specified timeoutperiod, twd (see Section 3: Watchdog timing). While the system is operating correctly, itperiodically toggles the watchdog input, WDI. If the system fails, the watchdog timer is notreset, a system alert is generated and the watchdog output, WDO, is asserted (seeSection 3: Watchdog timing).The STWD100 circuit also has an enable pin, EN (see Figure 2), which can enable ordisable the watchdog functionality. The EN pin is connected to the internal pull-downresistor. The device is enabled if the EN pin is left floating.

    標(biāo)簽: 3.3 看門狗 芯片

    上傳時(shí)間: 2013-10-22

    上傳用戶:taiyang250072

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