This is the Xilinx Dual Processor Reference Designs suite. The designs illustrate a few differentdual-core architectures based on the MicroBlaze™ and PowerPC™ processors. The designsillustrate various concepts described in the Xilinx White Paper WP262 titled, “DesigningMultiprocessor Systems in Platform Studio”. There are simple software applications includedwith the reference designs that show various forms of interaction between the two processors.
Abstract: High-speed and low-speed data converters serve critical functions in modern broadband mobile radios. This application note outlines how todetermine high-speed data converter performance requirements in baseband sampling radio architectures. Also, system partition strategies andadvantages are outlined when considering a high-speed analog front-end (AFE) solution.
This application note describes how to retrieve user-defined data from Xilinx configurationPROMs (XC18V00 and Platform Flash devices) after the same PROM has configured theFPGA. The method to add user-defined data to the configuration PROM file is also discussed.The reference design described in this application note can be used in any of the followingXilinx FPGA architectures: Spartan™-II, Spartan-IIE, Spartan-3, Virtex™, Virtex-E, Virtex-II,and Virtex-II Pro.
Field Programmable Gate Arrays (FPGAs) are becoming a critical part of every system design. Many vendors offer many different architectures and processes. Which one is right for your design? How do you design one of these so that it works correctly and functions as you expect in your entire system? These are the questions that this paper sets out to answer.
lwIP is a small independent implementation of the TCP/IP protocol
suite that has been developed by Adam Dunkels at the Computer and
Networks architectures (CNA) lab at the Swedish Institute of Computer
Science (SICS).
Micro In-System Programmer Brief Installation Notes
Enter the src directory.
If uisp does not compile successfully, add switch -DNO_DIRECT_IO in the
Makefile to remove support for direct I/O port access (that may be
necessary on non-PC architectures). Parallel port access should still
work if you have the Linux ppdev driver (patch for 2.2.17 is in the
kernel directory, ppdev is standard in 2.4 kernels). Please lobby
Alan Cox to include this tiny little driver in 2.2.x too :).
To make it type:
make
and to install it:
make install
If you have any further doubts, please consult UISP s homepage:
http://www.nongnu.org/uisp/
This lab exercise will cover the use of AccelDSP’s design exploration capabilities that include mapping variables to memory and unrolling loop and vector operations. You will learn how to create different hardware architectures without modifying the MATLAB source to explore different area/performance tradeoffs.
