設(shè)計(jì)了水聲信號(hào)發(fā)生系統(tǒng)中的功率放大電路，可將前級(jí)電路產(chǎn)生的方波信號(hào)轉(zhuǎn)換為正弦信號(hào)，同時(shí)進(jìn)行濾波、功率放大，使其滿足換能器對(duì)輸入信號(hào)的要求。該電路以單片機(jī)AT89C52，集成6階巴特沃思低通濾波芯片MF6以及大功率運(yùn)算放大器LM12為核心，通過標(biāo)準(zhǔn)RS232接口與PC進(jìn)行通信，實(shí)現(xiàn)信號(hào)增益的程控調(diào)節(jié)，對(duì)干擾信號(hào)具有良好的抑制作用。經(jīng)調(diào)試該電路工作穩(wěn)定正常，輸出波形無失真，在輸出功率以及放大增益、波紋系數(shù)等方面均滿足設(shè)計(jì)要求。 This paper presented a design and implementation of underwater acoustic power amplifer. This circuit converted the rectangle signal generated by frontend circuit into the sine signal， then filtered and power amplification， it meets the requirements of the transducer.Included AT89C52， 6th order Butterworth filter MF6， hipower amplififier LM12.Communication with PC through the RS232 port. The signal gain is adjustable and could be remote controlled. It has a good inhibitory effect on the interference signal. After debugged， this circuit works stable， the output waveform has no distortion， it meets the design requirement in outprt power， amplifier gain and ripple factor.
上傳時(shí)間： 2013-11-20
上傳用戶：qwe1234
Differential Nonlinearity: Ideally, any two adjacent digitalcodes correspond to output analog voltages that are exactlyone LSB apart. Differential non-linearity is a measure of theworst case deviation from the ideal 1 LSB step. For example,a DAC with a 1.5 LSB output change for a 1 LSB digital codechange exhibits 1⁄2 LSB differential non-linearity. Differentialnon-linearity may be expressed in fractional bits or as a percentageof full scale. A differential non-linearity greater than1 LSB will lead to a non-monotonic transfer function in aDAC.Gain Error (Full Scale Error): The difference between theoutput voltage (or current) with full scale input code and theideal voltage (or current) that should exist with a full scale inputcode.Gain Temperature Coefficient (Full Scale TemperatureCoefficient): Change in gain error divided by change in temperature.Usually expressed in parts per million per degreeCelsius (ppm/°C).Integral Nonlinearity (Linearity Error): Worst case deviationfrom the line between the endpoints (zero and full scale).Can be expressed as a percentage of full scale or in fractionof an LSB.LSB (Lease-Significant Bit): In a binary coded system thisis the bit that carries the smallest value or weight. Its value isthe full scale voltage (or current) divided by 2n, where n is theresolution of the converter.Monotonicity: A monotonic function has a slope whose signdoes not change. A monotonic DAC has an output thatchanges in the same direction (or remains constant) for eachincrease in the input code. the converse is true for decreasing codes.
標(biāo)簽： Converters Defini DAC
上傳時(shí)間： 2013-10-30
上傳用戶：stvnash
ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.
標(biāo)簽： Converter Defi ADC 轉(zhuǎn)換器
上傳時(shí)間： 2013-11-12
上傳用戶：pans0ul
分析了調(diào)幅信號(hào)和載波信號(hào)之間的相位差與調(diào)制信號(hào)的極性的對(duì)應(yīng)關(guān)系,得出了相敏檢波電路輸出電壓的極性與調(diào)制信號(hào)的極性有對(duì)應(yīng)關(guān)系的結(jié)論。為了驗(yàn)證相敏檢波電路的這一特性,給出3 個(gè)電路方案,分別選用理想元件和實(shí)際元件,采用Multisim 對(duì)其進(jìn)行仿真實(shí)驗(yàn),直觀形象地演示了相敏檢波電路的鑒相特性,是傳統(tǒng)的實(shí)際操作實(shí)驗(yàn)所不可比擬的。關(guān)鍵詞:相敏檢波;鑒相特性;Multisim;電路仿真 Abstract : The corresponding relation between modulation signal polarity and difference phases of amplitudemodulated signal and the carrier signal ,the polarity of phase2sensitive detecting circuit output voltage and the polarity of modulation signal are correspondent . In order to verify this characteristic ,three elect ric circuit s plans are produced ,idea element s and actual element s are selected respectively. Using Multisim to carry on a simulation experiment ,and then demonst rating the phase detecting characteristic of the phase sensitive circuit vividly and directly. Which is t raditional practical experience cannot be com pared.Keywords :phase sensitive detection ;phase2detecting characteristic ;Multisim;circuit simulation
上傳時(shí)間： 2013-11-23
上傳用戶：guanhuihong
Power conversion by virtue of its basic role produces harmonics due to theslicing of either voltages or currents. To a large extent the pollution in theutility supply and the deterioration of the power quality has been generatedor created by non-linear converters. It is therefore ironic that power convertersshould now be used to clean up the pollution that they helped to create inthe first place.In a utility system, it is desirable to prevent harmonic currents (which resultin EMI and resonance problems) and limit reactive power flows (whichresult in transmission losses).Traditionally, shunt passive filters, comprised of tuned LC elements andcapacitor banks, were used to filter the harmonics and to compensate forreactive current due to non-linear loads. However, in practical applicationsthese methods have many disadvantages.
上傳時(shí)間： 2013-11-05
上傳用戶：AISINI005
This reference design (RD) features a fullyassembled and tested surface-mount printed circuitboard (PCB). The RD board utilizes the MAX48851:2 or 2:1 multiplexer and other ICs to implement acomplete video graphics array (VGA) 8:1multiplexer.VGA input/output connections are provided to easilyinterface the MAX4885 RD board with VGAcompatibledevices. The RD board gives the optionto use a single 5V DC power supply (V+), or this RDboard can be powered from any one of the eight VGA sources.
標(biāo)簽： multiplexer reference VGA
上傳時(shí)間： 2013-11-09
上傳用戶：ANRAN
PCI ExpressTM Architecture Add-in Card Compliance Checklist for the PCI Express Base 1.0a SpecificationThe PCI Special Interest Group disclaims all warranties and liability for the use of this document and the information contained herein and assumes no responsibility for any errors that may appear in this document, nor does the PCI Special Interest Group make a commitment to update the information contained herein.Contact the PCI Special Interest Group office to obtain the latest revision of this checklistQuestions regarding the ths document or membership in the PCI Special Interest Group may be forwarded tPCI Special Interest Group5440 SW Westgate Drive #217Portland, OR 97221Phone: 503-291-2569Fax: 503-297-1090 DISCLAIMERThis document is provided "as is" with no warranties whatsoever, including any warranty of merchantability, noninfringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample. The PCI SIG disclaims all liability for infringement of proprietary rights, relating to use of information in this specification. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein.
標(biāo)簽： Architecture ExpressTM PCI
上傳時(shí)間： 2013-11-03
上傳用戶：gy592333
高速數(shù)字系統(tǒng)設(shè)計(jì)下載pdf:High-Speed Digital SystemDesign—A Handbook ofInterconnect Theory and DesignPracticesStephen H. HallGarrett W. HallJames A. McCallA Wiley-Interscience Publication JOHN WILEY & SONS, INC.New York • Chichester • Weinheim • Brisbane • Singapore • TorontoCopyright © 2000 by John Wiley & Sons, Inc.speeddigital systems at the platform level. The book walks the reader through everyrequired concept, from basic transmission line theory to digital timing analysis, high-speedmeasurement techniques, as well as many other topics. In doing so, a unique balancebetween theory and practical applications is achieved that will allow the reader not only tounderstand the nature of the problem, but also provide practical guidance to the solution.The level of theoretical understanding is such that the reader will be equipped to see beyondthe immediate practical application and solve problems not contained within these pages.Much of the information in this book has not been needed in past digital designs but isabsolutely necessary today. Most of the information covered here is not covered in standardcollege curricula, at least not in its focus on digital design, which is arguably one of the mostsignificant industries in electrical engineering.The focus of this book is on the design of robust high-volume, high-speed digital productssuch as computer systems, with particular attention paid to computer busses. However, thetheory presented is applicable to any high-speed digital system. All of the techniquescovered in this book have been applied in industry to actual digital products that have beensuccessfully produced and sold in high volume.Practicing engineers and graduate and undergraduate students who have completed basicelectromagnetic or microwave design classes are equipped to fully comprehend the theorypresented in this book. At a practical level, however, basic circuit theory is all thebackground required to apply the formulas in this book.
標(biāo)簽： 高速數(shù)字 系統(tǒng)設(shè)計(jì)
上傳時(shí)間： 2013-10-26
上傳用戶：縹緲
OPTOELECTRONICS CIRCUIT COLLECTION AVALANCHE PHOTODIODE BIAS SUPPLY 1Provides an output voltage of 0V to +80V for reverse biasingan avalanche photodiode to control its gain. This circuit canalso be reconfigured to supply a 0V to –80V output.LINEAR TEC DRIVER–1This is a bridge-tied load (BTL) linear amplifier for drivinga thermoelectric cooler (TEC). It operates on a single +5Vsupply and can drive ±2A into a common TEC.LINEAR TEC DRIVER–2This is very similar to DRIVER–1 but its power output stagewas modified to operate from a single +3.3V supply in orderto increase its efficiency. Driving this amplifier from astandard +2.5V referenced signal causes the output transistorsto have unequal power dissipation.LINEAR TEC DRIVER–3This BTL TEC driver power output stage achieves very highefficiency by swinging very close to its supply rails, ±2.5V.This driver can also drive ±2A into a common TEC. Operationis shown with the power output stage operating on±1.5V supplies. Under these conditions, this linear amplifiercan achieve very high efficiency. Application ReportThe following collection of analog circuits may be useful in electro-optics applications such as optical networkingsystems. This page summarizes their salient characteristics.
標(biāo)簽： 光電轉(zhuǎn)換 電路設(shè)計(jì)
上傳時(shí)間： 2013-10-27
上傳用戶：落花無痕
The equal-area theorem●This is sinusoidal PWM (SPWM)●The equal-area theorem can be appliedto realize any shape of waveforms ●Natural sampling●Calculation based on equal-area criterion●Selected harmonic elimination●Regular sampling●Hysteresis-band control●Triangular wave comparison withfeedback control
上傳時(shí)間： 2013-11-22
上傳用戶：linyao
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