RFID networks are currently recognized as one a research area of priority. Research activities related to RFID technology have been booming recently. A number of ongoing projects are being funded in Europe, Asia, and North America. According to leading market analysts, the development of the RFID market is projected to increase from approximately $3 billion in 2005 to $25 billion in 2015. Several countries have dedicated innovation programs to support and develop RFID systems and related technologies: the RFID initiative in Taiwan, Ubiquitous Japan and the NSF SBIR program in the USA. The EU has recently advertised its Strategic Research Roadmap concerning the Internet of Things, which first of all refers to the RFID technology before being extended to commu- nicating devices as in M2M (Machine to Machine). In this roadmap, several application domains have been identified:
上傳時間： 2020-06-08
上傳用戶：shancjb
This introductory chapter is devoted to reviewing the fundamental ideas of control from a multivariable point of view. In some cases, the mathematics and operations on systems (modelling, pole placement, etc.), as previously treated in introductory courses and textbooks, convey to the readers an un- realistic image of systems engineering. The simplifying assumptions, simple examples and “perfect” model set-up usually used in these scenarios present the control problem as a pure mathematical problem, sometimes losing the physical meaning of the involved concepts and operations. We try to empha- sise the engineering implication of some of these concepts and, before entering into a detailed treatment of the different topics, a general qualitative overview is provided in this chapter.
標簽： MultivariableControlSystems
上傳時間： 2020-06-10
上傳用戶：shancjb
n recent years, there have been many books published on power system optimization. Most of these books do not cover applications of artifi cial intelligence based methods. Moreover, with the recent increase of artifi cial intelligence applications in various fi elds, it is becoming a new trend in solving optimization problems in engineering in general due to its advantages of being simple and effi cient in tackling complex problems. For this reason, the application of artifi cial intelligence in power systems has attracted the interest of many researchers around the world during the last two decades. This book is a result of our effort to provide information on the latest applications of artifi cial intelligence to optimization problems in power systems before and after deregulation.
標簽： Intelligence Artificial System Power in
上傳時間： 2020-06-10
上傳用戶：shancjb
基于FPGA設計的sdram讀寫測試實驗Verilog邏輯源碼Quartus工程文件+文檔說明，DRAM選用海力士公司的 HY57V2562 型號,容量為的 256Mbit,采用了 54 引腳的TSOP 封裝, 數據寬度都為 16 位, 工作電壓為 3.3V,并丏采用同步接口方式所有的信號都是時鐘信號。FPGA型號Cyclone4E系列中的EP4CE6F17C8，Quartus版本17.1。timescale 1ps/1psmodule top(input clk,input rst_n,output[1:0] led,output sdram_clk, //sdram clockoutput sdram_cke, //sdram clock enableoutput sdram_cs_n, //sdram chip selectoutput sdram_we_n, //sdram write enableoutput sdram_cas_n, //sdram column address strobeoutput sdram_ras_n, //sdram row address strobeoutput[1:0] sdram_dqm, //sdram data enable output[1:0] sdram_ba, //sdram bank addressoutput[12:0] sdram_addr, //sdram addressinout[15:0] sdram_dq //sdram data);parameter MEM_DATA_BITS = 16 ; //external memory user interface data widthparameter ADDR_BITS = 24 ; //external memory user interface address widthparameter BUSRT_BITS = 10 ; //external memory user interface burst widthparameter BURST_SIZE = 128 ; //burst sizewire wr_burst_data_req; // from external memory controller,write data request ,before data 1 clockwire wr_burst_finish; // from external memory controller,burst write finish
標簽： fpga sdram verilog quartus
上傳時間： 2021-12-18
上傳用戶：
ABB機器人編程手冊.pdfAliasIO is used to define a signal of any type with an alias name or to use signals in builtin task modules. Signals with alias names can be used for predefined generic programs, without any modification of the program before running in different robot installations. The instruction AliasIO must be run before any use of the actual signal. See Basic examples on page 21 for loaded modules, and More examples on page 22 for installed modules.
上傳時間： 2022-03-28
上傳用戶：kingwide
Note: before commissioning the value of the connected mains voltage must be set in the servo controller(factory setting=3×400 V AC). More detailed information see chapter 4"Commissioning".通訊接口所有的Servo-One系列均有USB及TCP/IP通訊接口，可通過LT-I公司的Drive-Manager5軟件進行通訊，進行相關參數的讀寫和現場調試，詳情請參考章節.…軟件調試。Servo-One Junior:X9（USB1.1）TCP/IP（開發中）Servo-One:X2（USB1.1）X3（TCP/IP）Note: The faults can be acknowledged in accordance with their programmed reaction(ER) or reset via a 24 V-reset(X9/10)(ER.).Attention: Faults marked with a dot can only be reset, after the cause of the fault has been eliminated.顯示為當前版本V5.4.0同時，相應的USB接口驅動也在對應的安裝文件夾內，例：C:\Program FileLTI DRiVES GmbHILTi DriveManager 5.4.0drivers
標簽： servoone
上傳時間： 2022-06-24
上傳用戶：
