Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上傳時間： 2013-11-21
上傳用戶：不懂夜的黑
針對傳統(tǒng)集成電路（ASIC）功能固定、升級困難等缺點，利用FPGA實現(xiàn)了擴頻通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核實現(xiàn)NCO模塊，在下變頻模塊調(diào)用了硬核乘法器并引入CIC濾波器進(jìn)行低通濾波，給出了DQPSK解調(diào)的原理和實現(xiàn)方法，推導(dǎo)出一種簡便的引入?仔/4固定相移的實現(xiàn)方法。采用模塊化的設(shè)計方法使用VHDL語言編寫出源程序，在Virtex-II Pro 開發(fā)板上成功實現(xiàn)了整個系統(tǒng)。測試結(jié)果表明該系統(tǒng)正確實現(xiàn)了STEL-2000A的核心功能。 Abstract: To overcome drawbacks of ASIC such as fixed functionality and upgrade difficulty, FPGA was used to realize the core functions of STEL-2000A. This paper used the DDS IP core provided by ISE to realize the NCO module, called hard core multiplier and implemented CIC filter in the down converter, described the principle and implementation detail of the demodulation of DQPSK, and derived a simple method to introduce a fixed phase shift of ?仔/4. The VHDL source code was designed by modularity method , and the complete system was successfully implemented on Virtex-II Pro development board. Test results indicate that this system successfully realize the core function of the STEL-2000A.
上傳時間： 2013-11-19
上傳用戶：neu_liyan
本文利用Verilog HDL 語言自頂向下的設(shè)計方法設(shè)計多功能數(shù)字鐘，突出了其作為硬件描述語言的良好的可讀性、可移植性和易理解等優(yōu)點，并通過Altera QuartusⅡ 4.1 和ModelSim SE 6.0 完成綜合、仿真。此程序通過下載到FPGA 芯片后，可應(yīng)用于實際的數(shù)字鐘顯示中。 關(guān)鍵詞：Verilog HDL；硬件描述語言；FPGA Abstract: In this paper, the process of designing multifunctional digital clock by the Verilog HDL top-down design method is presented, which has shown the readability, portability and easily understanding of Verilog HDL as a hard description language. Circuit synthesis and simulation are performed by Altera QuartusⅡ 4.1 and ModelSim SE 6.0. The program can be used in the truly digital clock display by downloading to the FPGA chip. Keywords: Verilog HDL；hardware description language；FPGA
標(biāo)簽： Verilog HDL 多功能 數(shù)字
上傳時間： 2013-11-10
上傳用戶：hz07104032
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
標(biāo)簽： pci PCB 設(shè)計規(guī)范
上傳時間： 2014-01-24
上傳用戶：s363994250
華為pcb布線規(guī)范
上傳時間： 2013-11-04
上傳用戶：gtzj
pkpm2005破解版安裝方式： 一、Windows XP下PKPM的安裝方法： 1. 先安裝正版的 PKPM 。 2. 將本機的 system32\WinSCard.DLL 改名為 SysCard.DLL 。 3. 將本破解包里的 WinSCard.INI 復(fù)制到 C: 盤根目錄。 4. 將本破解包里的 WinSCard.DLL 復(fù)制到系統(tǒng)system32目錄。 5. 將本破解包里的 WinSCard.DLL 復(fù)制到pkpm里各模塊目錄下。 二、Win 7下PKPM的安裝方法： 1.解壓后有兩個文件夾：（PKPM2005.12.17）和（PKPM2005.12.17綜合破解方案） 先打開前一個文件夾安裝正版的 PKPM 。 2. 打開后一個文件夾將本機的 system32\WinSCard.DLL 改名為 SysCard.DLL 。 3. 將本破解包里的 WinSCard.INI 復(fù)制到 C: 盤根目錄。 4. 將本破解包里的 WinSCard.DLL 復(fù)制到系統(tǒng)system32目錄。 5. 將本破解包里的 WinSCard.DLL 復(fù)制到pkpm里各模塊目錄下（就是安裝好的程序中的所有文件夾）。 6。還有WinSCard.INI 復(fù)制到 C: 盤根目錄需要在安全模式下進(jìn)行。 注意：（windows7中修改系統(tǒng)文件需要獲得TrustedInstaller權(quán)限，具體修改方法：在WINDOWS7下要刪除某些文件或文件夾時提示“您需要TrustedInstaller提供的權(quán)限才能對此文件進(jìn)行更改”，這種情況是因為我們在登陸系統(tǒng)時的管理員用戶名無此文件的管理權(quán)限，而此文件的管理權(quán)限是“TrustedInstaller”這個用戶，在控制面板的用戶管理里面是看不到的。要想對這個文件或文件夾進(jìn)行操作，可以用以下方法進(jìn)行：在此文件或文件夾上點右鍵，選“屬性”→“安全”，這時在“組或用戶名”欄可以看到一個“TrustedInstaller”用戶名，而登陸系統(tǒng)的管理員用戶名沒有此文件的“完全控制”權(quán)限，這時我們可以選擇“高級”→“所有者”→“編輯”，在“將所有者更改為”欄中選擇登陸系統(tǒng)的管理員用戶名，然后點“應(yīng)用”，這時出現(xiàn)“如果您剛獲得此對象的所有權(quán)，在查看或更改權(quán)限之前，您將需關(guān)閉并重新打開此對象的屬性”對話框，點“確定”，再點兩個“確定”，在“安全”對話框中選“編輯”，出現(xiàn)了該文件或文件夾“的權(quán)限”對話框，在上面的欄中選中登陸系統(tǒng)的管理員用戶名，在下面的欄中選擇全部“允許”，然后點“應(yīng)用”，再點兩個“確定”，這時你就可以擁有該文件或文件夾的更改權(quán)限了。） 這里有兩份破解包，雖然有些文件相同，但針對不同用戶，可能一個包不能破解，所以推出兩包破解綜合方案，這兩個包文件名分別為：pkpmcr1.rar和pkpmcr2.rar，下載后，分別解壓，先運行pkpmcr1.rar中的setup.bat文件，如果提示：“一個文件正在使用，已復(fù)制0個文件。”并運行PKPM后發(fā)現(xiàn)未能破解，請將pkpmcr2.rar包中WinSCard.DLL文件復(fù)制到PKPM各模塊所在文件夾中，即可完成破解，本站試用過結(jié)構(gòu)、建筑、鋼結(jié)構(gòu)三個模塊，均可用，如需應(yīng)用到工程實際中，請與正版對比后，斟酌使用，謝謝。本站對其未對比就使用此破解版導(dǎo)致的不良后果，不負(fù)責(zé)任，切記。本貼已關(guān)閉，有事請在本版開新貼說明。 這是PKPM2005.12.17版綜合破解方案的第二包，文件名是pkpmcr2.rar，應(yīng)用請遵循第一貼的說明,這二個包是有區(qū)別的，雖然文件名和大小及其屬性相同，但還是有區(qū)別的，請看兩個包中的說明文件，如果包1未能成功破解，請用包2，謝謝. 這里FTP里有以下軟件可以下載用戶名xudown密碼down ftp://219.153.14.92/APM2005.exe ftp://219.153.14.92/PKPM2005.12.17.rar ftp://219.153.14.92/比較工具.exe ftp://219.153.14.92/橋梁通安裝狗.exe ftp://219.153.14.92/正版鎖計算模型的結(jié)果.rar
上傳時間： 2013-10-23
上傳用戶：gxy670166755
This Unix C code monitors a web server every few minutes by trying to retrieve its home page. It sends you email when it can t connect, and every so often while the server is still down. It sends a final message when it comes back up. If you have email paging, just direct the email to your pager address.
標(biāo)簽： monitors retrieve minutes server
上傳時間： 2015-01-11
上傳用戶：pompey
一個有undo，redo，cut等功能的JTextArea
標(biāo)簽： undo
上傳時間： 2014-01-09
上傳用戶：Altman
一個簡單的java教程，， 本人down的。無密碼
上傳時間： 2013-12-19
上傳用戶：ljt101007
這是一個用C語言編寫的在turboc環(huán)境下運行的小程序，有興趣的朋友可能DOWN下來
標(biāo)簽： turboc C語言 編寫 環(huán)境
上傳時間： 2015-03-18
上傳用戶：牛布牛
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