These Release Notes describe the functionalIty of the AudioCodes’ TrunkPack Series Boards and Digital Media Gateways supported by Software Release 4.8. Information contained in this document is believed to be accurate and reliable at the time of printing. However, due to ongoing product improvements and revisions, AudioCodes cannot guarantee the accuracy of printed material after the Date Published nor can it accept responsibility for errors or omissions.
標(biāo)簽： functionalIty AudioCodes TrunkPack the
上傳時(shí)間： 2017-08-08
上傳用戶：wuyuying
FP + OOP = Haskell. The programming language Haskell adds object-oriented functionalIty (using a concept known as type classes ) to a pure functional programming framework. This paper describes these extensions and analyzes its accomplishments as well as some problems.
標(biāo)簽： Haskell object-oriented functionalIty programming
上傳時(shí)間： 2014-09-02
上傳用戶：zhenyushaw
The LTC®4155 and LTC4156 are dual multiplexed-inputbattery chargers with PowerPath™ control, featuring I2Cprogrammability and USB On-The-Go for systems suchas tablet PCs and other high power density applications.The LTC4155’s float voltage (VFLOAT) range is optimizedfor Li-Ion batteries, while the LTC4156 is optimized forlithium iron phosphate (LiFePO4)batteries, supportingsystem loads to 4A with up to 3.5A of battery chargecurrent. I2C controls a broad range of functions and USBOn-The-Go functionalIty is controlled directly from theUSB connector ID pin.
標(biāo)簽： 高電流 便攜式產(chǎn)品 電池充電器 方案
上傳時(shí)間： 2013-10-09
上傳用戶：hanhanj
針對(duì)目前使用的RS232接口數(shù)字化B超鍵盤(pán)存在PC主機(jī)啟動(dòng)時(shí)不能設(shè)置BIOS，提出一種PS2鍵盤(pán)的設(shè)計(jì)方法。基于W78E052D單片機(jī)，采用8通道串行A/D轉(zhuǎn)換器設(shè)計(jì)了8個(gè)TGC電位器信息采集電路，電位器位置信息以鍵盤(pán)掃描碼序列形式發(fā)送，正交編碼器信號(hào)通過(guò)XC9536XL轉(zhuǎn)換為單片機(jī)可接收的中斷信號(hào)，軟件接收到中斷信息后等效處理成按鍵。結(jié)果表明，在滿足開(kāi)機(jī)可設(shè)置BIOS同時(shí)，又可實(shí)現(xiàn)超聲特有功能，不需要專門(mén)設(shè)計(jì)驅(qū)動(dòng)程序，接口簡(jiǎn)單，成本低。 Abstract: Aiming at the problem of the digital ultrasonic diagnostic imaging system keyboard with RS232 interface currently used couldn?蒺t set the BIOS when the PC boot， this paper proposed a design method of PS2 keyboards. Based on W78E052D microcontroller，designed eight TGC potentiometers information acquisition circuit with 8-channel serial A/D converter， potentiometer position information sent out with keyboard scan code sequentially.The control circuit based on XC9536 CPLD is used for converting the mechanical actions of the encoders into the signals that can be identified by the MCU， software received interrupt information and equivalently treatmented as key. The results show that the BIOS can be set to meet the boot， ultrasound specific functionalIty can be achieved at the same time， it does not require specially designed driver，the interface is simple and low cost.
標(biāo)簽： 單片機(jī) B超 數(shù)字化 鍵盤(pán)設(shè)計(jì)
上傳時(shí)間： 2013-10-10
上傳用戶：asdfasdfd
PICKIT™ 2 PROGRAMMER-TO-GO USER GUIDE The PICkit 2 Programmer-To-Go functionalIty allows a PIC MCU memory image to be downloaded into the PICkit 2 unit for later programming into a specific PIC MCU. No software or PC is required to program devices once the PICkit 2 unit is set up for Programming-To-Go. A USB power source for the PICkit 2 is all that is needed.
標(biāo)簽： PROGRAMMER-TO PICKIT 8482
上傳時(shí)間： 2013-10-29
上傳用戶：ca05991270
The STWD100 watchdog timer circuits are self-contained devices which prevent systemfailures that are caused by certain types of hardware errors (non-responding peripherals,bus contention, etc.) or software errors (bad code jump, code stuck in loop, etc.).The STWD100 watchdog timer has an input, WDI, and an output, WDO (see Figure 2). Theinput is used to clear the internal watchdog timer periodically within the specified timeoutperiod, twd (see Section 3: Watchdog timing). While the system is operating correctly, itperiodically toggles the watchdog input, WDI. If the system fails, the watchdog timer is notreset, a system alert is generated and the watchdog output, WDO, is asserted (seeSection 3: Watchdog timing).The STWD100 circuit also has an enable pin, EN (see Figure 2), which can enable ordisable the watchdog functionalIty. The EN pin is connected to the internal pull-downresistor. The device is enabled if the EN pin is left floating.
上傳時(shí)間： 2013-10-22
上傳用戶：taiyang250072
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionalIty and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上傳時(shí)間： 2013-10-22
上傳用戶：ztj182002
In the past decade, the size and complexity of manyFPGA designs exceeds the time and resourcesavailable to most design teams, making the use andreuse of Intellectual Property (IP) imperative.However, integrating numerous IP blocks acquiredfrom both internal and external sources can be adaunting challenge that often extends, rather thanshortens, design time. As today's designs integrateincreasing amounts of functionalIty, it is vital thatdesigners have access to proven, up-to-date IP fromreliable sources.
上傳時(shí)間： 2013-11-15
上傳用戶：lyy1234
This application note describes how the existing dual-port block memories in the Spartan™-IIand Virtex™ families can be used as Quad-Port memories. This essentially involves a dataaccess time (halved) versus functionalIty (doubled) trade-off. The overall bandwidth of the blockmemory in terms of bits per second will remain the same.
上傳時(shí)間： 2013-11-08
上傳用戶：lou45566
針對(duì)傳統(tǒng)集成電路（ASIC）功能固定、升級(jí)困難等缺點(diǎn)，利用FPGA實(shí)現(xiàn)了擴(kuò)頻通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核實(shí)現(xiàn)NCO模塊，在下變頻模塊調(diào)用了硬核乘法器并引入CIC濾波器進(jìn)行低通濾波，給出了DQPSK解調(diào)的原理和實(shí)現(xiàn)方法，推導(dǎo)出一種簡(jiǎn)便的引入?仔/4固定相移的實(shí)現(xiàn)方法。采用模塊化的設(shè)計(jì)方法使用VHDL語(yǔ)言編寫(xiě)出源程序，在Virtex-II Pro 開(kāi)發(fā)板上成功實(shí)現(xiàn)了整個(gè)系統(tǒng)。測(cè)試結(jié)果表明該系統(tǒng)正確實(shí)現(xiàn)了STEL-2000A的核心功能。 Abstract: To overcome drawbacks of ASIC such as fixed functionalIty and upgrade difficulty, FPGA was used to realize the core functions of STEL-2000A. This paper used the DDS IP core provided by ISE to realize the NCO module, called hard core multiplier and implemented CIC filter in the down converter, described the principle and implementation detail of the demodulation of DQPSK, and derived a simple method to introduce a fixed phase shift of ?仔/4. The VHDL source code was designed by modularity method , and the complete system was successfully implemented on Virtex-II Pro development board. Test results indicate that this system successfully realize the core function of the STEL-2000A.
標(biāo)簽： STEL 2000 FPGA 擴(kuò)頻通信
上傳時(shí)間： 2013-11-06
上傳用戶：liu123
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