This book is a hands-on introduction to the principles and practice of embedded system design using the PIC microcontroller. Packed with helpful examples and illustrations, it gives an in-depth treatment of microcontroller design, programming in both assembly language and C, and features advanced topics such as networking and real-time operating systems. It is accompanied by a CD-ROM containing copies of all programs and software tools used in the text and a `student version of the C complier Designing Embedded Systems with PIC Microcontrollers: Principles and Applications is ideal for students of electronics, mechatronics and computer engineering. Engineers in industry and informed hobbyists will also find this book a valuable resource when designing and implementing both simple and sophisticated embedded systems using the PIC Microcontroller.
標簽： introduction principles hands-on embedded
上傳時間： 2014-01-17
上傳用戶：wuyuying
Testbenches have become an integral part of the design process, enabling you to verify that your HDL model is sufficiently tested before implementing your design and helping you automate the design verification process. It is essential, therefore, that you have confidence your testbench is thoroughly exercising your design. Collecting code coverage statistics during simulation helps to ensure the quality and thoroughness of your tests.
標簽： Testbenches enabling integral process
上傳時間： 2014-01-25
上傳用戶：ynzfm
THIS book covers the Java™ Native Interface (JNI). It will be useful to you if you are interested in any of the following: • integrating a Java application with legacy code written in languages such as C or C++ • incorporating a Java virtual machine implementation into an existing application written in languages such as C or C++ • implementing a Java virtual machine • understanding the technical issues in language interoperability, in particular how to handle features such as garbage collection and multithreading
標簽： Interface you interes Native
上傳時間： 2013-12-12
上傳用戶：ljmwh2000
This paper provides incumbent wireless Internet service providers (WISPs), new WISPs and demanding new markets (such as government and education) with a technical analysis of alternatives for implementing last-mile wireless broadband services.
標簽： WISPs incumbent demanding providers
上傳時間： 2014-01-05
上傳用戶：二驅蚊器
Testbenches have become an integral part of the design process, enabling you to verify that your HDL model is sufficiently tested before implementing your design and helping you automate the design verification process. It is essential, therefore, that you have confidence your testbench is thoroughly exercising your design. Collecting code coverage statistics during simulation helps to ensure the quality and thoroughness of your tests.
標簽： Testbenches enabling integral process
上傳時間： 2016-03-24
上傳用戶：1109003457
FIR濾波器的C++實現 Below are program source listings for FIR.h and FIR.cpp, the header file and class file for implementing arbitrary causal FIR filters in the Synthesis Tool Kit (STK) framework
上傳時間： 2013-12-11
上傳用戶：heart520beat
This specification defines the Audio Codec ‘97 (AC ‘97) Architecture and Digital Interface (AC-link) specifically designed for implementing audio and modem I/O functionality in mainstream PC systems. This specification does not explicitly define the companion AC ‘97 Digital Controller component (sometimes referred to or abbreviated as DC ‘97), which typically varies in features and implementation, but is AC ‘97 compliant with this specification.
標簽： specification Architecture Interface AC-link
上傳時間： 2014-01-23
上傳用戶：zl5712176
This resource is designed as a text for educational programs in advanced programming and as a reference for professionals implementing Web- and Internet-based applications.
標簽： educational programming resource designed
上傳時間： 2014-01-13
上傳用戶：181992417
Written for embedded systems programmers and engineers, as well as networking professionals, this in-depth guide provides an inside look at the entire process of implementing and using the Linux TCP/IP stack in embedded systems projects.
標簽： professionals programmers networking engineers
上傳時間： 2016-10-24
上傳用戶：小碼農lz
DDR SDRAM控制器的VHDL源代碼，含詳細設計文檔。 The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock Manager (DCM) provides the required Delay Locked Loop (DLL), Digital Phase Shift (DPS), and Digital Frequency Synthesis (DFS) functions. This application note describes a controller design for a 16-bit DDR SDRAM. The application note and reference design are enhanced versions of XAPP200 targeted to the Virtex-II series of FPGAs. At a clock rate of 133 MHz, 16-bit data changes at both clock edges. The reference design is fully synthesizable and achieves 133 MHz performance with automatic place and route tools.
上傳時間： 2014-11-01
上傳用戶：l254587896
